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Updated chip select to use the GPIO control method.
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You'd think that using the hardware method would be faster
but it's not.  Using the GPIO method is.
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gtjoseph committed Dec 9, 2019
1 parent 2a772ad commit 86ecc69
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Showing 3 changed files with 6 additions and 11 deletions.
3 changes: 3 additions & 0 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,9 @@ If you want to create your own flash package you can use the scripts in the
directory, and your u-boot.bin file to Linux_for_Tegra/bootloader/t210ref/p3450-porg/
directory.

* Copy create-signed-partitions.sh and create-flash-package.sh to your
Linux_for_Tegra directory.

* From your Linux_for_Tegra directory, run `sudo ./create-signed-partitions.sh -r 200`
where "200" is the board rev id for the "a02" boards. Adjust as necessary.
This command will apply the DTBs to the appropriate partition blobs and sign
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Original file line number Diff line number Diff line change
Expand Up @@ -54,23 +54,23 @@ index b226e1a..68f451c 100755
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
diff --git a/kernel-dts/tegra210-porg-p3448-common.dtsi b/kernel-dts/tegra210-porg-p3448-common.dtsi
index 79e916f..63508b0 100644
index 79e916f..6bea53c 100644
--- a/kernel-dts/tegra210-porg-p3448-common.dtsi
+++ b/kernel-dts/tegra210-porg-p3448-common.dtsi
@@ -203,6 +203,22 @@

spi@7000d400 { /* SPI 1 to 40 pin header */
status = "okay";
+ num-cs = <1>;
+ cs-gpios = <&gpio TEGRA_GPIO(C, 3) GPIO_ACTIVE_LOW>;
+ spi0_0 {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ compatible = "spidev";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <54000000>;
+ spi-max-frequency = <65000000>;
+ controller-data {
+ nvidia,enable-hw-based-cs;
+ nvidia,cs-setup-clk-count = <0x1e>;
+ nvidia,cs-hold-clk-count = <0x1e>;
+ nvidia,rx-clk-tap-delay = <0x1f>;
Expand All @@ -80,11 +80,3 @@ index 79e916f..63508b0 100644
};

spi@7000d600 { /* SPI 2 to 40 pin header */
@@ -800,6 +816,7 @@
suspend-output-low;
gpios = <
TEGRA_GPIO(A, 6) 0
+ TEGRA_GPIO(C, 3) 0
>;
};
};
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