Interrupts

This describes how interrupts are supported in this project.

level | posedge | negedge | bothedge

This is used during detection of when to update the register. The following code shows how this is handled:

assign levelint_i0_next = levelint_i0_wdata; // level
assign posint_i0_next = posint_i0_wdata & ~posint_i0_wdata_d; // posedge
assign negint_i0_next = ~negint_i0_wdata & negint_i0_wdata_d; // negedge
assign bothint_i0_next = bothint_i0_wdata ^ bothint_i0_wdata_d; // bothedge

sticky | stickybit | nonsticky

• sticky fields will only be updated if they are currently 0 (i.e. if !reg: reg = next)
• stickybit fields will update each bit that is currently 0 (i.e. reg = next | reg)
• nonsticky fields have normal behaviour (i.e. reg = next)

outputs

• Interrupt register will have a _intr output (combined single bit interrupt)
• Halt registers will have a _halt output (combined single bit halt)
• Interrupt fields will have a _intr output (same width as field)
• Halt fields will have a _halt output (same width as field)