The Srdy-Drdy library is an interface standard for connecting RTL blocks together in an FPGA and ASIC with a unidirectional interface that provides bidirectional flow control. The library is also a set of components which are compliant to the interface definition and provide a variety of functions from basic timing closure to buffering and arbitration between blocks.
-
Notifications
You must be signed in to change notification settings - Fork 4
hutch31/sdlib
Folders and files
| Name | Name | Last commit message | Last commit date | |
|---|---|---|---|---|
Repository files navigation
About
srdy-drdy library
Resources
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published