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Double ampersand in asm constraints #382
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not doing so could lead to a double-ampersand being emitted, which is not correct see #382
I did some debugging and it turns out that the constraint that After a quick-and-dirty patch to fix double ampersand emission, a number of other things didn't work in your example, because c2rust was (as noted here) assuming that all inline assembly was x86_64, and in fact generally does not consider the target architecture when doing translation. I've added logic to attempt to extract target architecture information from Clang flags (though not currently from the flags in the compilation db) and woven this info through our assembly translation; the result is in the fw/target-dependent-asm branch. I'd appreciate if you can try that branch and see if it works any better. For the example you provided, it generates this output: #[no_mangle]
pub unsafe extern "C" fn rust___STREXB(
mut value: uint8_t,
mut addr: *mut uint8_t,
) -> uint32_t {
let mut result: uint32_t = 0;
asm!(
"strexb {0}, [{2}], {1}", out(reg) result, in (reg) & mut * addr, inlateout(reg)
value as uint32_t => _, options(preserves_flags)
);
return result;
} However, playing around with this code at godbolt (I don't have an ARM Rust toolchain locally), it seems we may not be generating the right templates for the assembly operands here--it complains of "invalid instruction", which only seems to be fixed if I manually change which argument is marked as a memory reference ( |
I believe I've fixed the cause of the incorrect operand being marked as a memory reference in fead6b0. |
Thank you. The fix does allow C2Rust to get through the translation, similar to my previous crude hack (but more properly). Like with that, I wind up with tons of other errors later, but one at a time I guess. |
not doing so could lead to a double-ampersand being emitted, which is not correct see #382
The current branch diff --git a/c2rust-transpile/src/translator/assembly.rs b/c2rust-transpile/src/translator/assembly.rs
index 6f0a37de..66844808 100644
--- a/c2rust-transpile/src/translator/assembly.rs
+++ b/c2rust-transpile/src/translator/assembly.rs
@@ -62,7 +62,8 @@ fn parse_arch(target_tuple: &str) -> Option<Arch> {
target_tuple.starts_with("armv8") ||
target_tuple.starts_with("arm64") {
Some(Arch::Aarch64)
- } else if target_tuple.starts_with("arm") {
+ } else if target_tuple.starts_with("arm") ||
+ target_tuple.starts_with("thumbv") {
Some(Arch::Arm)
} else if target_tuple.starts_with("riscv") {
Some(Arch::Riscv) Judging from GCC's documentation on machine constraints, thumb and arm are the same for these purposes. (Generally they are different encodings of the same instruction set as far as I understand, so that fits). Once this is merged (and maybe there is a release, even alpha/beta as in #388), I'd love to switch over to using this. |
not doing so could lead to a double-ampersand being emitted, which is not correct see #382
Fixed in #383. |
This assembly snippet causes a panic when transpiled using the current master (9c1600a) -- for testing, note it's ARM assembly as per the target in the compile commands:
I didn't track down far enough to see how the
&&
came to be, but I've tracked things down to a crude workaround and stopgap:I'm not even PR'ing this, because given that there is no double ampersand in the C constraint, my impression is that something is adding the ampersand in without checking whether there is already one present. Also, I couldn't test whether plain head trimming of all "&" characters even does the right thing (as the assembly snippet in question is unused in the RIOT project which I'm transpiling, but I can't easily remove it either as it's part of a larger vendor import).
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