[SYCL] Allow fpga_reg only for PODs and Trivially-copyable structs (#3643)

This change restricts the INTEL::fpga_reg function to only take in trivially copyable structs, and models the hardware better but created a registered copy, rather than just passing through as a reference. 

The intention of this function was initially built for PODs and later extended to structs in OpenCL. It literally is used to force a register stage in hardware between the input and output (i.e. in the software model, it is an exact copy of the data in memory). It doesn't translate directly to C++ objects because classes with complex copy constructors cannot be modelled to do what is described above, and building out this builtin in hardware as per the software model reduces its use case. As such, restricting the function to only types that have a usable and correct implementation of this function is the ideal thing to do here

Note that I also removed the old mapping to intelfpga::fpga_reg as part of this changelist. 

Testing:
- Ran this new header file with a variety of SYCL examples in the FPGA design suite to ensure that it was still behaving in its intended behavior

Author: ajaykumarkannan

sycl/include/CL/sycl/INTEL/fpga_reg.hpp

@@ -9,12 +9,31 @@
 #pragma once
 
 #include <CL/sycl/detail/defines.hpp>
+#include <type_traits>
 
 __SYCL_INLINE_NAMESPACE(cl) {
 namespace sycl {
 namespace INTEL {
 
-template <typename _T> _T fpga_reg(const _T &t) {
+// Returns a registered copy of the input
+// This function is intended for FPGA users to instruct the compiler to insert
+// at least one register stage between the input and the return value.
+template <typename _T>
+typename std::enable_if<std::is_trivially_copyable<_T>::value, _T>::type
+fpga_reg(_T t) {
+#if __has_builtin(__builtin_intel_fpga_reg)
+  return __builtin_intel_fpga_reg(t);
+#else
+  return t;
+#endif
+}
+
+template <typename _T>
+[[deprecated("INTEL::fpga_reg will only support trivially_copyable types in a "
+             "future release. The type used here will be disallowed.")]]
+typename std::enable_if<std::is_trivially_copyable<_T>::value == false,
+                        _T>::type
+fpga_reg(_T t) {
 #if __has_builtin(__builtin_intel_fpga_reg)
   return __builtin_intel_fpga_reg(t);
 #else
@@ -29,7 +48,9 @@ template <typename _T> _T fpga_reg(const _T &t) {
 // Keep it consistent with FPGA attributes like intelfpga::memory()
 // Currently clang does not support nested namespace for attributes
 namespace intelfpga {
-template <typename _T> _T fpga_reg(const _T &t) {
+template <typename _T>
+[[deprecated("intelfpga::fpga_reg will be removed in a future release.")]] _T
+fpga_reg(const _T &t) {
   return cl::sycl::INTEL::fpga_reg(t);
 }
 } // namespace intelfpga