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[SYCL] Allow fpga_reg only for PODs and Trivially-copyable structs #3643
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and imply that a copy is created so that the x86 and the FPGA model are equivalent. We want to only allow trivially copyable structs, because we're creating an exact copy on device.
I think the process for removing APIs includes adding a deprecation warning about removing an API in future releases and some time period for our users to transition to a new API. |
Do we definitely want |
What is the error message if fpga_reg is passed something that is not trivially copyabe? |
@bader I just reviewed our gold docs and we used the |
Yes |
https://godbolt.org/z/ca41TKzMv Clang Error:
GCC Error:
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@mkinsner I think yes. |
@jessicadavies-intel, @mkinsner, @pvchupin, do you have any objections to merge this? |
I don't have objections but it would be good if FPGA folks can approve this, having backward compatibility concerns. |
37739ac
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Approve to start tests
We can test and relax in a future change, if desired. tuple, for example, will be made illegal by the trivially copyable restriction, and I thing we'd want to allow such types long term. |
ccca3ba
fpga_reg(_T t) { | ||
template <typename _T> _T fpga_reg(_T t) { | ||
static_assert(std::is_trivially_copyable<_T>::value, | ||
"Type is not trivially_copyable."); |
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Yes, that looks simple and understandable. :-)
@keryell had to change it to do deprecation warnings instead for at least 2021.4. Can you please re-review this from the usability point of view? Thanks! |
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LGTM
* upstream/sycl: (649 commits) [SYCL][Driver][NFC] Update integration footer test for 32-bit host (intel#4039) [SYCL][L0] Initialize descriptor .stype and .pNext (intel#4032) [SYCL] Add sycl::kernel::get_kernel_bundle method (intel#3855) [SYCL] Add support for device UUID as a SYCL extension. (intel#3696) [SYCL][Matrix] Add spec document for the matrix extension interface and its first implementation for AMX (intel#3551) Fix debug build mangler test after PR#3992 (8f38045). (intel#4033) [Driver][SYCL] Restrict user -include file in final integration footer step (intel#4036) [SYCL] [Tests] Do not copy device binary image mocks (intel#4023) [SYCL][Doc] Update docs to reflect new compiler features (intel#4030) [SYCL][CUDA] cl_khr_fp16 extension connected to cuda PI. (intel#4029) [SYCL][NFC] Refactor RT unit tests (intel#4021) [SYCL] Switch to using integration footer by default (intel#3777) [SYCL][CUDA] Add the Use Default Stream property (intel#4004) Uplift GPU RT version for Linux to 21.24.20098 (intel#4003) [SYCL][CUDA] atomic_ref.fetch_add used for fp64 reduction if device.has(atomic64) (intel#3950) [Driver][SYCL] Differentiate host dependency link from regular host link (intel#4002) [SYCL][ESIMD] Support device half type in intrinsics. (intel#4024) [SYCL] Allow fpga_reg only for PODs and Trivially-copyable structs (intel#3643) [SYCL][FPGA] Restore legacy debug info version for the hardware (intel#3991) [SYCL][PI][L0] Force reset of memcpy command-list. (intel#4001) ...
This change restricts the INTEL::fpga_reg function to only take in trivially copyable structs, and models the hardware better but created a registered copy, rather than just passing through as a reference.
The intention of this function was initially built for PODs and later extended to structs in OpenCL. It literally is used to force a register stage in hardware between the input and output (i.e. in the software model, it is an exact copy of the data in memory). It doesn't translate directly to C++ objects because classes with complex copy constructors cannot be modelled to do what is described above, and building out this builtin in hardware as per the software model reduces its use case. As such, restricting the function to only types that have a usable and correct implementation of this function is the ideal thing to do here
Note that I also removed the old mapping to intelfpga::fpga_reg as part of this changelist.
Testing: