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improved led dimming #23

Merged
merged 1 commit into from
Apr 10, 2021
Merged

improved led dimming #23

merged 1 commit into from
Apr 10, 2021

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rPraml
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@rPraml rPraml commented Apr 4, 2021

DISCLAIMER

This mod may drive the shelly dimmer out of spec, at it may have more switching losses as in trailing edge mode.
Do not use it with capacitive loads.


Hello @jamesturton,

I had similar flickering problems like in #6. I tried the beta firmware and this gives much better results.

My hardware setup is a Shelly Dimmer 2 with LED spots https://www.amazon.de/gp/product/B08C5CMQLM
(They are based on SM2082EG constant current controller - similar to schematic on page 10 http://www.szjuquan.com/upload_files/qb_sell_/pdf/SM2082EG.pdf)

The problem was, that on low dimming voltages, the led flickers. I inspecht the output voltage with the oscilloscope and saw, that the trailing edge is "jittering".
It seems that the stm32 is not always in sync with the line freqency. I tried different things, to improve line sync.

  1. My first thought was, that other interrupts (ADC/UART) will interfere with the EXTI or TIM1 interrupt. So I compiled a minimal STM32 firmware with hard coded dimming value. Not much improvement.
  2. I tried to low-pass filter the line freq, as the line freq should be stable. You can see the idea here: rPraml@6a49ea3#diff-e0cf5b28d9b6b600f0af2bc78e8fd30ec675fd731a5da86f0c4283ffc0e40176R929
  3. I also tried to set the timer values first in the EXTI routine and then do the more expensive current and voltage calculations. (I know from different MCs that divisions take different cycles and may cause jitter)

But all I tried, I always ended with some jitter in the output voltage. So I tried a different approach based on the follwing idea:

When dimming to 10%, why use the beginning 10% of the sine wave and not a 10% section later in the sine wave?

A normal trailing edge will always use the sine wave from the beginning.

Example:

5% trailing edge
UPeak ~50v

20 % trailing edge
UPeak ~ 185v

Here we come to the next problem: The LEDs above have a forward voltage from ~200V, so they will start glow somewhere about 185V and run with full brightness if the sine wave has > 200V.
This makes them prone to flickering if the peak voltage jitters around a few volts only.

So my idea is, not to use the beginning section of the sine wave, but a section 30% - current dimming value:

Some examples:

5%

10%

20%

30%

40%

80%

Currently, I use the warmup_brightness value, so I can set it with the ShdWarmupBrightness command. I get better dimming results for a value between 18 and 22.

Unfortunaltely, there is still some flickering, but I wanted to share this idea with you.
Maybe you have some other ideas to improve dimming. I think, the best soluttion will be to find a way to synchronize the timer to the line frequency. Maybe the TIM1 should run with +/-100Hz and EXTI should sync it like a PLL

Cheers
Roland

@jamesturton
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Hi Roland!

Thanks for your interest in this project and also for taking the time to contribute!

Firstly, I really like the idea of filtering on the 'line frequency' value. As this device is supposed to be suitable for use in both 50Hz and 60Hz maybe the filter will need a little bit of tuning, but some kind of IIR filter like you have implemented should be a great improvement here.

Here we come to the next problem: The LEDs above have a forward voltage from ~200V, so they will start glow somewhere about 185V and run with full brightness if the sine wave has > 200V.
This makes them prone to flickering if the peak voltage jitters around a few volts only.

I've never thought about this before, but having a forward voltage of ~200V could indeed be causing flickering in some cases. I have no idea how 'safe' this dimming method might be, but I can do some testing and if it seems to fix more problems than it causes then I would say it would be ok.
Another dimming method I have come across (which I might experiment more with) is a symmetric dimming method, centred around the peak of the mains signal, however this doesn't seem to be used very much at all now. Maybe it's the worst of both worlds - I can try implement it and experiment.

Maybe the TIM1 should run with +/-100Hz and EXTI should sync it like a PLL

Again this is a really good sugesstion. Using filtering when syncing TIM1 might sort out some more problems. Let me know if you can think of a good aproach for this.

James

@J4nsen
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J4nsen commented Apr 9, 2021

In the early days of the Shelly Dimmer, the firmware also had a "center"-calibration mode. Visible in this video. However, in later firmwares this option was removed. I don't know why :-/

@jamesturton jamesturton merged commit c184ecb into jamesturton:main Apr 10, 2021
@jamesturton
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Tested your changes and it looks to work great for me! We shall see what people with the really bad flickering have to say also

@jamesturton
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I have just made one change, which is to make the default value for low_brightness_threshold zero untill more people have tested. If it turns out 30% is a good value I will change it back.

@rPraml
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rPraml commented Apr 10, 2021

Sorry for my late response. I currently do some simulations with LT-spice.
Also thanks to @J4nsen - my approach is similar to "center dimming". but it should not "stress" the LED so much.
My LEDs are based on this schematic:
grafik
(240V version)
And I burnt already one SM2028EG with leading edge dimming at ~50%. I assume, that turning on at the maximum at the sine wave will cause a too high voltage drop (and power dissipation) over the chip, when the capacitor discharges too much.

So center dimming with low dimming value will also send very short 317V peaks to the LED and may put too much stress on some (cheap) LEDs.
I also want to say, that my approach and also center dimming will have more switching losses in the mosfets of the shelly dimmer.

Currently, I have no spare dimmer (waiting for amazon order ;) ) so I play around with LT-Spice.

My main goal would be a PLL for the timer mentioned here: https://www.mikrocontroller.net/articles/PLL#Software_PLL but I did not find a good reference implementation.

I have found a page with a lot of information.
https://zipcpu.com/dsp/2017/12/14/logic-pll.html
My idea was to modify the prescaler slightly, so that the timer runs in sync with the line freq. (Normally, the line frequency is very stable and there should be also not much jitter.

I would use the timer to count from 0..100 and set the prescaler to ~4800 (for 50Hz)

Cheers
Roland

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3 participants