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1 | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2 |
| -; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE |
3 |
| -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1 |
4 |
| -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2 |
5 |
| -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512 |
| 2 | +; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE |
| 3 | +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1 |
| 4 | +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2 |
| 5 | +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512 |
| 6 | +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512FP16 |
6 | 7 |
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7 | 8 | define <2 x double> @prefer_f32_v2f64(ptr %p) nounwind {
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8 | 9 | ; SSE-LABEL: prefer_f32_v2f64:
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@@ -56,6 +57,13 @@ define <4 x double> @prefer_f32_v4f64(ptr %p) nounwind {
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56 | 57 | ; AVX512-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
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57 | 58 | ; AVX512-NEXT: vbroadcastsd %xmm0, %ymm0
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58 | 59 | ; AVX512-NEXT: retq
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| 60 | +; |
| 61 | +; AVX512FP16-LABEL: prefer_f32_v4f64: |
| 62 | +; AVX512FP16: # %bb.0: # %entry |
| 63 | +; AVX512FP16-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero |
| 64 | +; AVX512FP16-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0 |
| 65 | +; AVX512FP16-NEXT: vbroadcastsd %xmm0, %ymm0 |
| 66 | +; AVX512FP16-NEXT: retq |
59 | 67 | entry:
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60 | 68 | %0 = load float, ptr %p, align 4
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61 | 69 | %vecinit.i = insertelement <4 x float> undef, float %0, i64 0
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@@ -99,6 +107,13 @@ define <4 x float> @prefer_f16_v4f32(ptr %p) nounwind {
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99 | 107 | ; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
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100 | 108 | ; AVX512-NEXT: vbroadcastss %xmm0, %xmm0
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101 | 109 | ; AVX512-NEXT: retq
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| 110 | +; |
| 111 | +; AVX512FP16-LABEL: prefer_f16_v4f32: |
| 112 | +; AVX512FP16: # %bb.0: # %entry |
| 113 | +; AVX512FP16-NEXT: vmovsh (%rdi), %xmm0 |
| 114 | +; AVX512FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0 |
| 115 | +; AVX512FP16-NEXT: vbroadcastss %xmm0, %xmm0 |
| 116 | +; AVX512FP16-NEXT: retq |
102 | 117 | entry:
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103 | 118 | %0 = load half, ptr %p, align 4
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104 | 119 | %vecinit.i = insertelement <4 x half> undef, half %0, i64 0
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@@ -144,6 +159,13 @@ define <8 x float> @prefer_f16_v8f32(ptr %p) nounwind {
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144 | 159 | ; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
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145 | 160 | ; AVX512-NEXT: vbroadcastss %xmm0, %ymm0
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146 | 161 | ; AVX512-NEXT: retq
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| 162 | +; |
| 163 | +; AVX512FP16-LABEL: prefer_f16_v8f32: |
| 164 | +; AVX512FP16: # %bb.0: # %entry |
| 165 | +; AVX512FP16-NEXT: vmovsh (%rdi), %xmm0 |
| 166 | +; AVX512FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0 |
| 167 | +; AVX512FP16-NEXT: vbroadcastss %xmm0, %ymm0 |
| 168 | +; AVX512FP16-NEXT: retq |
147 | 169 | entry:
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148 | 170 | %0 = load half, ptr %p, align 4
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149 | 171 | %vecinit.i = insertelement <8 x half> undef, half %0, i64 0
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@@ -191,6 +213,13 @@ define <2 x double> @prefer_f16_v2f64(ptr %p) nounwind {
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191 | 213 | ; AVX512-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
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192 | 214 | ; AVX512-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
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193 | 215 | ; AVX512-NEXT: retq
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| 216 | +; |
| 217 | +; AVX512FP16-LABEL: prefer_f16_v2f64: |
| 218 | +; AVX512FP16: # %bb.0: # %entry |
| 219 | +; AVX512FP16-NEXT: vmovsh (%rdi), %xmm0 |
| 220 | +; AVX512FP16-NEXT: vcvtsh2sd %xmm0, %xmm0, %xmm0 |
| 221 | +; AVX512FP16-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] |
| 222 | +; AVX512FP16-NEXT: retq |
194 | 223 | entry:
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195 | 224 | %0 = load half, ptr %p, align 4
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196 | 225 | %vecinit.i = insertelement <2 x half> undef, half %0, i64 0
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@@ -240,6 +269,13 @@ define <4 x double> @prefer_f16_v4f64(ptr %p) nounwind {
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240 | 269 | ; AVX512-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
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241 | 270 | ; AVX512-NEXT: vbroadcastsd %xmm0, %ymm0
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242 | 271 | ; AVX512-NEXT: retq
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| 272 | +; |
| 273 | +; AVX512FP16-LABEL: prefer_f16_v4f64: |
| 274 | +; AVX512FP16: # %bb.0: # %entry |
| 275 | +; AVX512FP16-NEXT: vmovsh (%rdi), %xmm0 |
| 276 | +; AVX512FP16-NEXT: vcvtsh2sd %xmm0, %xmm0, %xmm0 |
| 277 | +; AVX512FP16-NEXT: vbroadcastsd %xmm0, %ymm0 |
| 278 | +; AVX512FP16-NEXT: retq |
243 | 279 | entry:
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244 | 280 | %0 = load half, ptr %p, align 4
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245 | 281 | %vecinit.i = insertelement <4 x half> undef, half %0, i64 0
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