Skip to content

Commit 2d73295

Browse files
committed
[X86] Add AVX512FP16 test coverage to splat(fpext) tests.
1 parent db6961d commit 2d73295

File tree

1 file changed

+40
-4
lines changed

1 file changed

+40
-4
lines changed

llvm/test/CodeGen/X86/prefer-fpext-splat.ll

Lines changed: 40 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,9 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE
3-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
4-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
5-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
2+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE
3+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
4+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
5+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
6+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512FP16
67

78
define <2 x double> @prefer_f32_v2f64(ptr %p) nounwind {
89
; SSE-LABEL: prefer_f32_v2f64:
@@ -56,6 +57,13 @@ define <4 x double> @prefer_f32_v4f64(ptr %p) nounwind {
5657
; AVX512-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
5758
; AVX512-NEXT: vbroadcastsd %xmm0, %ymm0
5859
; AVX512-NEXT: retq
60+
;
61+
; AVX512FP16-LABEL: prefer_f32_v4f64:
62+
; AVX512FP16: # %bb.0: # %entry
63+
; AVX512FP16-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
64+
; AVX512FP16-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
65+
; AVX512FP16-NEXT: vbroadcastsd %xmm0, %ymm0
66+
; AVX512FP16-NEXT: retq
5967
entry:
6068
%0 = load float, ptr %p, align 4
6169
%vecinit.i = insertelement <4 x float> undef, float %0, i64 0
@@ -99,6 +107,13 @@ define <4 x float> @prefer_f16_v4f32(ptr %p) nounwind {
99107
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
100108
; AVX512-NEXT: vbroadcastss %xmm0, %xmm0
101109
; AVX512-NEXT: retq
110+
;
111+
; AVX512FP16-LABEL: prefer_f16_v4f32:
112+
; AVX512FP16: # %bb.0: # %entry
113+
; AVX512FP16-NEXT: vmovsh (%rdi), %xmm0
114+
; AVX512FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
115+
; AVX512FP16-NEXT: vbroadcastss %xmm0, %xmm0
116+
; AVX512FP16-NEXT: retq
102117
entry:
103118
%0 = load half, ptr %p, align 4
104119
%vecinit.i = insertelement <4 x half> undef, half %0, i64 0
@@ -144,6 +159,13 @@ define <8 x float> @prefer_f16_v8f32(ptr %p) nounwind {
144159
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
145160
; AVX512-NEXT: vbroadcastss %xmm0, %ymm0
146161
; AVX512-NEXT: retq
162+
;
163+
; AVX512FP16-LABEL: prefer_f16_v8f32:
164+
; AVX512FP16: # %bb.0: # %entry
165+
; AVX512FP16-NEXT: vmovsh (%rdi), %xmm0
166+
; AVX512FP16-NEXT: vcvtsh2ss %xmm0, %xmm0, %xmm0
167+
; AVX512FP16-NEXT: vbroadcastss %xmm0, %ymm0
168+
; AVX512FP16-NEXT: retq
147169
entry:
148170
%0 = load half, ptr %p, align 4
149171
%vecinit.i = insertelement <8 x half> undef, half %0, i64 0
@@ -191,6 +213,13 @@ define <2 x double> @prefer_f16_v2f64(ptr %p) nounwind {
191213
; AVX512-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
192214
; AVX512-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
193215
; AVX512-NEXT: retq
216+
;
217+
; AVX512FP16-LABEL: prefer_f16_v2f64:
218+
; AVX512FP16: # %bb.0: # %entry
219+
; AVX512FP16-NEXT: vmovsh (%rdi), %xmm0
220+
; AVX512FP16-NEXT: vcvtsh2sd %xmm0, %xmm0, %xmm0
221+
; AVX512FP16-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
222+
; AVX512FP16-NEXT: retq
194223
entry:
195224
%0 = load half, ptr %p, align 4
196225
%vecinit.i = insertelement <2 x half> undef, half %0, i64 0
@@ -240,6 +269,13 @@ define <4 x double> @prefer_f16_v4f64(ptr %p) nounwind {
240269
; AVX512-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
241270
; AVX512-NEXT: vbroadcastsd %xmm0, %ymm0
242271
; AVX512-NEXT: retq
272+
;
273+
; AVX512FP16-LABEL: prefer_f16_v4f64:
274+
; AVX512FP16: # %bb.0: # %entry
275+
; AVX512FP16-NEXT: vmovsh (%rdi), %xmm0
276+
; AVX512FP16-NEXT: vcvtsh2sd %xmm0, %xmm0, %xmm0
277+
; AVX512FP16-NEXT: vbroadcastsd %xmm0, %ymm0
278+
; AVX512FP16-NEXT: retq
243279
entry:
244280
%0 = load half, ptr %p, align 4
245281
%vecinit.i = insertelement <4 x half> undef, half %0, i64 0

0 commit comments

Comments
 (0)