Clean code for BlueBrain/CoreNeuron#250 (BlueBrain/CoreNeuron#421)

* Replace assert(!busy) with nrn_assert
    nrn_assert is compiled too when in release mode.
* Using using instead of typedef

CoreNEURON Repo SHA: BlueBrain/CoreNeuron@08c2aeb

src/coreneuron/gpu/nrn_acc_manager.cpp

@@ -464,7 +464,7 @@ void realloc_net_receive_buffer(NrnThread* nt, Memb_list* ml) {
 #endif
 }
 
-typedef std::pair<int, int> NRB_P;
+using NRB_P = std::pair<int, int>;
 
 struct comp {
     bool operator()(const NRB_P& a, const NRB_P& b) {

src/coreneuron/io/global_vars.cpp

@@ -16,8 +16,8 @@ int (*nrn2core_get_global_int_item_)(const char* name);
 
 using namespace std;
 namespace coreneuron {
-typedef pair<size_t, double*> PSD;
-typedef map<string, PSD> N2V;
+using PSD = pair<size_t, double*>;
+using N2V = map<string, PSD>;
 
 static N2V* n2v;
 

src/coreneuron/io/nrn_checkpoint.hpp

@@ -71,16 +71,16 @@ extern int patstimtype;
 // nrn_setup.cpp and debugging only information which is retrievable from
 // NrnThread and Memb_list. Ideally, this should all go away
 
-typedef struct Memb_list_ckpnt {
+struct Memb_list_ckpnt {
     // debug only
     double* data_not_permuted;
     Datum* pdata_not_permuted;
     int* nodeindices_not_permuted;
-} Memb_list_chkpnt;
+};
 
 #endif  // CHKPNTDEBUG but another section for it below
 
-typedef struct NrnThreadChkpnt {
+struct NrnThreadChkpnt {
     int file_id;
 
 #if CHKPNTDEBUG
@@ -109,7 +109,7 @@ typedef struct NrnThreadChkpnt {
     int* vecplay_ix;
 #endif  // CHKPNTDEBUG
 
-} NrnThreadChkpnt;
+};
 
 extern NrnThreadChkpnt* nrnthread_chkpnt;
 }  // namespace coreneuron

src/coreneuron/io/nrn_filehandler.hpp

@@ -157,7 +157,7 @@ class FileHandler {
     }
 
     /** Defined flag values for parse_array() */
-    typedef enum parse_action { read, seek } parse_action;
+    enum parse_action { read, seek };
 
     /** Generic parse function for an array of fixed length.
      *

src/coreneuron/io/nrnsection_mapping.hpp

@@ -11,9 +11,9 @@
 namespace coreneuron {
 
 /** type to store every section and associated segments */
-typedef std::vector<int> segvec_type;
-typedef std::map<int, segvec_type> secseg_map_type;
-typedef secseg_map_type::iterator secseg_it_type;
+using segvec_type = std::vector<int>;
+using secseg_map_type = std::map<int, segvec_type>;
+using secseg_it_type = secseg_map_type::iterator;
 
 /** @brief Section to segment mapping
  *

src/coreneuron/mechanism/mech/mod2c_core_thread.hpp

@@ -31,10 +31,10 @@ namespace coreneuron {
  *        and need to be refactored.
  */
 
-typedef int DIFUN;
-typedef int NEWTFUN;
-typedef int SPFUN;
-typedef int EULFUN;
+using DIFUN = int;
+using NEWTFUN = int;
+using SPFUN = int;
+using EULFUN = int;
 #pragma acc routine seq
 extern int nrn_derivimplicit_steer(int, _threadargsproto_);
 #define difun(arg) nrn_derivimplicit_steer(arg, _threadargs_);
@@ -45,28 +45,28 @@ extern int nrn_newton_steer(int, _threadargsproto_);
 extern int nrn_euler_steer(int, _threadargsproto_);
 #define eulerfun(arg) nrn_euler_steer(arg, _threadargs_);
 
-typedef struct Elm {
+struct Elm {
     unsigned row;        /* Row location */
     unsigned col;        /* Column location */
     double* value;       /* The value SOA  _cntml_padded of them*/
     struct Elm* r_up;    /* Link to element in same column */
     struct Elm* r_down;  /*       in solution order */
     struct Elm* c_left;  /* Link to left element in same row */
     struct Elm* c_right; /*       in solution order (see getelm) */
-} Elm;
+};
 #define ELM0 (Elm*)0
 
-typedef struct Item {
+struct Item {
     Elm* elm;
     unsigned norder; /* order of a row */
     struct Item* next;
     struct Item* prev;
-} Item;
+};
 #define ITEM0 (Item*)0
 
-typedef Item List; /* list of mixed items */
+using List = Item; /* list of mixed items */
 
-typedef struct SparseObj {  /* all the state information */
+struct SparseObj {  /* all the state information */
     Elm** rowst;            /* link to first element in row (solution order)*/
     Elm** diag;             /* link to pivot element in row (solution order)*/
     void* elmpool;          /* no interthread cache line sharing for elements */
@@ -87,7 +87,7 @@ typedef struct SparseObj {  /* all the state information */
     List* orderlist; /* list of rows sorted by norder
                              that haven't been used */
     int do_flag;
-} SparseObj;
+};
 
 #pragma acc routine seq
 extern double* _nrn_thread_getelm(SparseObj* so, int row, int col, int _iml);

src/coreneuron/mechanism/mech/modfile/pattern.mod

@@ -32,12 +32,12 @@ NET_RECEIVE (w) {LOCAL nst
 
 VERBATIM
 
-typedef struct {
+struct Info {
 	int size;
 	double* tvec;
 	int* gidvec;
 	int index;
-} Info;
+};
 
 #define INFOCAST Info** ip = (Info**)(&(_p_ptr))
 

src/coreneuron/mechanism/mech_mapping.cpp

@@ -8,9 +8,9 @@
 #include "coreneuron/permute/data_layout.hpp"
 
 namespace coreneuron {
-typedef size_t Offset;
-typedef int MechId;
-typedef const char* VariableName;
+using Offset = size_t;
+using MechId = int;
+using VariableName = const char*;
 
 struct cmp_str {
     bool operator()(char const* a, char const* b) const {
@@ -21,7 +21,7 @@ struct cmp_str {
 /*
  * Structure that map variable names of mechanisms to their value's location (offset) in memory
  */
-typedef std::map<MechId, std::map<VariableName, Offset, cmp_str> > MechNamesMapping;
+using MechNamesMapping = std::map<MechId, std::map<VariableName, Offset, cmp_str>>;
 static MechNamesMapping mechNamesMapping;
 
 static void set_an_offset(int mech_id, const char* variable_name, int offset) {

src/coreneuron/mechanism/mech_mapping.hpp

@@ -21,7 +21,7 @@
 namespace coreneuron {
 struct Memb_list;
 
-typedef const char** SerializedNames;
+using SerializedNames = const char**;
 
 // return pointer to value of a variable's mechanism, or nullptr if not found
 extern double* get_var_location_from_var_name(int mech_id,

src/coreneuron/mechanism/mechanism.hpp

@@ -49,11 +49,11 @@ union ThreadDatum {
 #endif
 
 /* will go away at some point */
-typedef struct Point_process {
+struct Point_process {
     int _i_instance;
     short _type;
     short _tid; /* NrnThread id */
-} Point_process;
+};
 
 struct NetReceiveBuffer_t {
     int* _displ;     /* _displ_cnt + 1 of these */

src/coreneuron/mechanism/membfunc.hpp

@@ -33,13 +33,13 @@ THE POSSIBILITY OF SUCH DAMAGE.
 #include "coreneuron/mechanism/mechanism.hpp"
 namespace coreneuron {
 
-typedef Datum* (*Pfrpdat)(void);
+using Pfrpdat = Datum* (*)(void);
 
 struct NrnThread;
 
-typedef void (*mod_alloc_t)(double*, Datum*, int);
-typedef void (*mod_f_t)(NrnThread*, Memb_list*, int);
-typedef void (*pnt_receive_t)(Point_process*, int, double);
+using mod_alloc_t = void (*)(double*, Datum*, int);
+using mod_f_t =  void (*)(NrnThread*, Memb_list*, int);
+using pnt_receive_t = void (*)(Point_process*, int, double);
 
 /*
  * Memb_func structure contains all related informations of a mechanism
@@ -114,12 +114,12 @@ extern int point_register_mech(const char**,
                                void* (*constructor)(),
                                void (*destructor)(),
                                int vectorized);
-typedef void (*NetBufReceive_t)(NrnThread*);
+using NetBufReceive_t = void (*)(NrnThread*);
 extern void hoc_register_net_receive_buffering(NetBufReceive_t, int);
 
 extern void hoc_register_net_send_buffering(int);
 
-typedef void (*nrn_watch_check_t)(NrnThread*, Memb_list*);
+using nrn_watch_check_t = void (*)(NrnThread*, Memb_list*);
 extern void hoc_register_watch_check(nrn_watch_check_t, int);
 
 extern void nrn_jacob_capacitance(NrnThread*, Memb_list*, int);
@@ -150,19 +150,7 @@ extern void _nrn_layout_reg(int, int);
 extern void _nrn_thread_reg0(int i, void (*f)(ThreadDatum*));
 extern void _nrn_thread_reg1(int i, void (*f)(ThreadDatum*));
 
-typedef void (*bbcore_read_t)(double*,
-                              int*,
-                              int*,
-                              int*,
-                              int,
-                              int,
-                              double*,
-                              Datum*,
-                              ThreadDatum*,
-                              NrnThread*,
-                              double);
-
-typedef void (*bbcore_write_t)(double*,
+using bbcore_read_t = void (*)(double*,
                                int*,
                                int*,
                                int*,
@@ -174,6 +162,18 @@ typedef void (*bbcore_write_t)(double*,
                                NrnThread*,
                                double);
 
+using bbcore_write_t = void (*)(double*,
+                                int*,
+                                int*,
+                                int*,
+                                int,
+                                int,
+                                double*,
+                                Datum*,
+                                ThreadDatum*,
+                                NrnThread*,
+                                double);
+
 extern int nrn_mech_depend(int type, int* dependencies);
 extern int nrn_fornetcon_cnt_;
 extern int* nrn_fornetcon_type_;

src/coreneuron/mechanism/patternstim.cpp

@@ -118,7 +118,7 @@ void nrn_mkPatternStim(const char* fname, double tstop) {
 }
 
 // comparator to sort spikes based on time
-typedef std::pair<double, int> spike_type;
+using spike_type = std::pair<double, int>;
 static bool spike_comparator(const spike_type& l, const spike_type& r) {
     return l.first < r.first;
 }

src/coreneuron/mechanism/register_mech.cpp

@@ -48,18 +48,10 @@ double t, dt, celsius;
 #endif
 int rev_dt;
 
-
-
-typedef void (*Pfrv)();
-
-
-
-
-
+using Pfrv = void (*)();
 
 static void ion_write_depend(int type, int etype);
 
-
 void hoc_reg_bbcore_read(int type, bbcore_read_t f) {
     if (type == -1) {
         return;

src/coreneuron/network/multisend.cpp

@@ -165,7 +165,7 @@ Multisend_ReceiveBuffer::Multisend_ReceiveBuffer() {
     phase2_head_ = phase2_tail_ = 0;
 }
 Multisend_ReceiveBuffer::~Multisend_ReceiveBuffer() {
-    assert(!busy_);
+    nrn_assert(!busy_);
     for (int i = 0; i < count_; ++i) {
         delete buffer_[i];
     }
@@ -188,7 +188,7 @@ void Multisend_ReceiveBuffer::init(int index) {
 }
 void Multisend_ReceiveBuffer::incoming(int gid, double spiketime) {
     // printf("%d %p.incoming %g %g %d\n", nrnmpi_myid, this, t, spk->spiketime, spk->gid);
-    assert(!busy_);
+    nrn_assert(!busy_);
     busy_ = true;
 
     if (count_ >= size_) {
@@ -218,7 +218,7 @@ void Multisend_ReceiveBuffer::incoming(int gid, double spiketime) {
 void Multisend_ReceiveBuffer::enqueue() {
     // printf("%d %p.enqueue count=%d t=%g nrecv=%d nsend=%d\n", nrnmpi_myid, this, t, count_,
     // nrecv_, nsend_);
-    assert(!busy_);
+    nrn_assert(!busy_);
     busy_ = true;
 
     for (int i = 0; i < count_; ++i) {
@@ -256,7 +256,7 @@ void Multisend_ReceiveBuffer::enqueue() {
 void Multisend_ReceiveBuffer::enqueue1() {
     // printf("%d %lx.enqueue count=%d t=%g nrecv=%d nsend=%d\n", nrnmpi_myid, (long)this, t,
     // count_, nrecv_, nsend_);
-    assert(!busy_);
+    nrn_assert(!busy_);
     busy_ = true;
     for (int i = 0; i < count_; ++i) {
         NRNMPI_Spike* spk = buffer_[i];
@@ -283,7 +283,7 @@ void Multisend_ReceiveBuffer::enqueue1() {
 void Multisend_ReceiveBuffer::enqueue2() {
     // printf("%d %lx.enqueue count=%d t=%g nrecv=%d nsend=%d\n", nrnmpi_myid, (long)this, t,
     // count_, nrecv_, nsend_);
-    assert(!busy_);
+    nrn_assert(!busy_);
     busy_ = false;
     for (int i = 0; i < count_; ++i) {
         NRNMPI_Spike* spk = buffer_[i];

src/coreneuron/network/netcvode.cpp

@@ -51,7 +51,7 @@ namespace coreneuron {
 #define PP2t(pp) (PP2NT(pp)->_t)
 //#define POINT_RECEIVE(type, tar, w, f) (*pnt_receive[type])(tar, w, f)
 
-typedef void (*ReceiveFunc)(Point_process*, double*, double);
+using ReceiveFunc = void (*)(Point_process*, double*, double);
 
 double NetCvode::eps_;
 NetCvode* net_cvode_instance;

src/coreneuron/network/partrans.hpp

@@ -16,9 +16,9 @@ namespace nrn_partrans {
 #endif
 
 #if NRNLONGSGID
-typedef int64_t sgid_t;
+using sgid_t = int64_t;
 #else
-typedef int sgid_t;
+using sgid_t = int;
 #endif
 
 struct HalfGap_Info {

src/coreneuron/network/tnode.hpp

@@ -7,7 +7,7 @@
 namespace coreneuron {
 class TNode;
 
-typedef std::vector<TNode*> VecTNode;
+using VecTNode = std::vector<TNode*>;
 
 class TNode {
   public:

src/coreneuron/network/tqueue.hpp

@@ -100,7 +100,7 @@ class TQItem {
     int cnt_;  // reused: -1 means it is in the splay tree, >=0 gives bin
 };
 
-typedef std::pair<double, TQItem*> TQPair;
+using TQPair = std::pair<double, TQItem*>;
 
 struct less_time {
     bool operator()(const TQPair& x, const TQPair& y) const {

src/coreneuron/nrnconf.h

@@ -39,9 +39,9 @@ namespace coreneuron {
 
 #define NRNBBCORE 1
 
-typedef int Datum;
-typedef int (*Pfri)();
-typedef char Symbol;
+using Datum = int;
+using Pfri = int(*)();
+using Symbol = char;
 
 #define VEC_A(i) (_nt->_actual_a[(i)])
 #define VEC_B(i) (_nt->_actual_b[(i)])