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feat: add comb dialect #949

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feat: add comb dialect #949

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luisacicolini
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@luisacicolini luisacicolini commented Jan 7, 2025

This PR adds the comb dialect.
truthTable operation and wildcard/cases SV semantics are missing, as they will require more infrastructure (and are not that used AFAIU)

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Alive Statistics: 90 / 93 (3 failed)

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github-actions bot commented Jan 7, 2025

Alive Statistics: 90 / 93 (3 failed)

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github-actions bot commented Jan 7, 2025

Alive Statistics: 90 / 93 (3 failed)

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github-actions bot commented Jan 7, 2025

Alive Statistics: 90 / 93 (3 failed)

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github-actions bot commented Jan 8, 2025

Alive Statistics: 90 / 93 (3 failed)

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github-actions bot commented Jan 8, 2025

Alive Statistics: 90 / 93 (3 failed)

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github-actions bot commented Jan 8, 2025

Alive Statistics: 90 / 93 (3 failed)

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github-actions bot commented Jan 8, 2025

Alive Statistics: 90 / 93 (3 failed)

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I have some comments about the way you model replicate

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To make, say, add, variadic you could add another parameter to the operation, as in:

| add (w : Nat) (arity : Nat)

Which you then pick up in the signature to specify we want arity operands

| add w arity => List.replicate arity (Ty.bv w)

(You might want to specify arity+1 instead, so you don't have to deal with the corner case of having 0 arguments).

For the operation semantics, you could fold over the list of argument using the current binary implementations

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alexkeizer commented Jan 9, 2025

more in general management of bitvectors' width: in the semantics I currently treat it as an additional argument of the operations (when the bitvectors involved need to have the same width), but I'm not sure this is the right approach

This is exactly what we do in LLVM dialect, and so far it's worked out great there, so it feels like the way to go here also!

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I'm not sure quite what you mean by sv behaviour or truth table operations, but feel free to ask if you have more specific questions about them!

@luisacicolini
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Thanks for the comments @alexkeizer! I'll start to fix the variadic implementation and the replicate.

sv is systemverilog-specific behavior, whose semantics requires a more complex model (I am not even sure we want to model that quite yet: you can find it in the wildcard and case in/equality sections here).

@luisacicolini luisacicolini marked this pull request as ready for review February 7, 2025 15:29
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This looks good to me :) Having n replicate functions is probably the right way to do it too.

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Alive Statistics: 90 / 93 (3 failed)

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@luisacicolini
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@alexkeizer @ymherklotz thanks for the review. I've added the enumfor the icmp op, will add one more example and then I believe we should be finally good to go :)

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Alive Statistics: 90 / 93 (3 failed)

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3 participants