8360116: Add support for AVX10 floating point minmax instruction #25914

jatin-bhateja · 2025-06-20T11:08:54Z

Intel@ AVX10 ISA [1] extensions added new floating point MIN/MAX instructions which comply with definitions in IEEE-754-2019 standard section 9.6 and can directly emulate Math.min/max semantics without the need for any special handling for NaN, +0.0 or -0.0 detection.

The following pseudo-code describes the existing algorithm for min/max[FD]:

Move the non-negative value to the second operand; this will ensure that we correctly handle 0.0 and -0.0 values, if values being compared are both 0.0s (of either sign), the value in the second operand (source operand) is returned. Existing MINPS and MAXPS semantics only check for NaN as the second operand; hence, we need special handling to check for NaN at the first operand.

btmp = (b < +0.0) ? a : b
atmp = (b < +0.0) ? b : a
Tmp = Max_Float(atmp , btmp)
Res = (atmp == NaN) ? atmp : Tmp

For min[FD] we need a small tweak in the above algorithm, i.e., move the non-negative value to the first operand, this will ensure that we correctly select -0.0 if both the operands being compared are 0.0 or -0.0.

btmp = (b < +0.0) ? b : a
atmp = (b < +0.0) ? a : b
Tmp = Max_Float(atmp , btmp)
Res = (atmp == NaN) ? atmp : Tmp

Thus, we need additional special handling for NaNs and +/-0.0 to compute floating-point min/max values to comply with the semantics of Math.max/min APIs using existing MINPS / MAXPS instructions. AVX10.2 added a new instruction, VPMINMAX[SH,SS,SD]/[PH,PS,PD], which comprehensively handles special cases, thereby eliminating the need for special handling.

Patch emits new instructions for reduction and non-reduction operations for single, double, and Float16 type.

Kindly review and share your feedback.

Best Regards,
Jatin

[1] https://www.intel.com/content/www/us/en/content-details/856721/intel-advanced-vector-extensions-10-2-intel-avx10-2-architecture-specification.html?wapkw=AVX10

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JDK-8360116: Add support for AVX10 floating point minmax instruction (Enhancement - P4)

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bridgekeeper · 2025-06-20T11:09:44Z

👋 Welcome back jbhateja! A progress list of the required criteria for merging this PR into master will be added to the body of your pull request. There are additional pull request commands available for use with this pull request.

openjdk · 2025-06-20T11:10:11Z

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See the Progress checklist in the description for automated requirements.

openjdk · 2025-06-20T11:10:39Z

@jatin-bhateja The following label will be automatically applied to this pull request:

hotspot

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jatin-bhateja · 2025-06-20T11:13:13Z

/label add hotspot-compiler-dev

openjdk · 2025-06-20T11:13:36Z

@jatin-bhateja
The hotspot-compiler label was successfully added.

mlbridge · 2025-06-25T10:35:08Z

Webrevs

mhaessig

Thank you for implementing these new instructions! I had a look at your changes and have a few minor suggestions and questions. I am quite new to this part of the codebase, so feel free to disagree if I am way off base.

How did you test these changes?

Also, if you merge the current master branch, the Windows build failures in the Github Actions will be fixed.

src/hotspot/cpu/x86/assembler_x86.cpp

mhaessig · 2025-06-25T15:19:49Z

src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp

+  assert(opc == Op_MinV || opc == Op_MinReductionV ||
+         opc == Op_MaxV || opc == Op_MaxReductionV, "sanity");
+  if (elem_bt == T_FLOAT) {
+    evminmaxps(dst, mask, src1, src2, true, opc == Op_MinV || opc == Op_MinReductionV ? 0x4 : 0x5, vlen_enc);


Perhaps 0x4 and 0x5 should be factored into named constants since they are used in multiple places and it would also help readability if one does not have the documentation handy when reading the code.

Hi @mhaessig ,
Command bits are in accordance with Tables 11.1 and 11.2 of section 11.2. First 2 bits [1:0] signify the operation kind, 00 for min and 01 for max. Next two bits [3:2] signify the sign selection logic and 4th bit 0 for both min/max, with this command word we can emulate the semantics of Math.max/min using a single AVX10 instruciton.

I got that from the documentation you kindly linked in the description. My question was rather to define a constant like AVX10_MINMAX_MAX_COMPARE_SIGN = 0x5 that can be used instead of the plain magic numbers. Because people looking at the code later will not have the "luxury" of being provided a link to the relevant documentation right when puzzling about what 0x4 means in this case.

mhaessig · 2025-06-25T15:26:25Z

src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp

@@ -1238,6 +1238,18 @@ void C2_MacroAssembler::evminmax_fp(int opcode, BasicType elem_bt,
  }
 }

+void C2_MacroAssembler::vminmax_fp(int opc, BasicType elem_bt, XMMRegister dst, KRegister mask,


Line 1122 mentions the differences between vminps/vmaxps and Java semantics. Perhaps a mention of the new instructions introduced in this PR might help people who are confused about the fact that vminmax_fp is overloaded.

Details on insturction semantics can be found in section 11.2 of AVX10 manual https://www.intel.com/content/www/us/en/content-details/856721/intel-advanced-vector-extensions-10-2-intel-avx10-2-architecture-specification.html?wapkw=AVX10

mhaessig · 2025-06-25T15:31:46Z

src/hotspot/cpu/x86/assembler_x86.hpp

+  void eminmaxsh(XMMRegister dst, XMMRegister nds, XMMRegister src, int imm8);
+  void eminmaxss(XMMRegister dst, XMMRegister nds, XMMRegister src, int imm8);
+  void eminmaxsd(XMMRegister dst, XMMRegister nds, XMMRegister src, int imm8);
+  void evminmaxph(XMMRegister dst, KRegister mask, XMMRegister nds, XMMRegister src, bool merge, int imm8, int vector_len);


Is there a reason evminmaxph does not have a version where src has type Address?

Currently, we do not have a matcher pattern to consume it, as the MIN/MAX sequence was anyway, a bulky one. I have added a new pattern for memory operand flavor of the pattern specifically for AVX-10, along with this patch.

Patch has been regressed over the following tests using Intel SDE https://www.intel.com/content/www/us/en/download/684897/intel-software-development-emulator.html (Version 9.53).

test/jdk/jdk/incubator/vector/Double*VectorTests:: (min/max all variants including reduction)

test/hotspot/jtreg/compiler/vectorization/TestFloat16VectorOperations.java

test/hotspot/jtreg/compiler/c2/irTests/TestFloat16ScalarOperations.java

e.g. command line /home/jatinbha/softwares/sde-external-9.53.0-2025-03-16-lin/sde64 -future -ptr_raise -icount -- java

openjdk bot added the hotspot hotspot-dev@openjdk.org label Jun 20, 2025

openjdk bot added the hotspot-compiler hotspot-compiler-dev@openjdk.org label Jun 20, 2025

8360116: Add support for AVX10 floating point minmax instruction

ecb2294

jatin-bhateja force-pushed the JDK-8360116 branch from 61646a5 to ecb2294 Compare June 21, 2025 20:16

jatin-bhateja added 2 commits June 25, 2025 15:10

Extending the patch to cover reduction operations

e775357

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jatin-bhateja marked this pull request as ready for review June 25, 2025 10:30

openjdk bot added the rfr Pull request is ready for review label Jun 25, 2025

mhaessig suggested changes Jun 25, 2025

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jatin-bhateja added 3 commits June 26, 2025 10:54

Merge branch 'master' of https://github.com/openjdk/jdk into JDK-8360116

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8360116: Add support for AVX10 floating point minmax instruction #25914

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