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Support 128-bit atomics on x86_64-fortanix-unknown-sgx #130552

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@taiki-e taiki-e commented Sep 19, 2024

Based on my comment in #99069 (comment):

If my understanding about the SGX target is correct, this is a target that requires Intel chip-specific technology, so I suspect that 128-bit atomics is always available (because all Intel x86_64 chips supports cmpxchg16b).

cc @jethrogb: Is it okay to have the above assumptions for this target? (Or is this target intentionally not currently enabling cx16 for some reason?)

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rustbot commented Sep 19, 2024

r? @wesleywiser

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@rustbot rustbot added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. labels Sep 19, 2024
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rustbot commented Sep 19, 2024

These commits modify compiler targets.
(See the Target Tier Policy.)

@jieyouxu jieyouxu added O-SGX Target: SGX A-atomic Area: Atomics, barriers, and sync primitives labels Sep 19, 2024
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Yes SGX is generally considered Intel-specific. If you could point to where in the Intel documentation it talks about 128-bit atomics always being supported, that would be helpful.

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taiki-e commented Sep 19, 2024

If you could point to where in the Intel documentation it talks about 128-bit atomics always being supported, that would be helpful.

Sorry, I do not know of any Intel documentation that explains this.

I mainly referred to the following three resources:

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taiki-e commented Sep 19, 2024

If you could point to where in the Intel documentation it talks about 128-bit atomics always being supported, that would be helpful.

Sorry, I do not know of any Intel documentation that explains this.

Ah, "CMPXCHG8B/CMPXCHG16B—Compare and Exchange Bytes" section in Intel 64 and IA-32 Architectures Software Developer’s Manual says CMPXCHG16B in 64-Bit Mode is "Valid".

(When it is not available on older CPUs, such as CMPXCHG8B/CMPXCHG in Compat/Leg Mode, it has annotation about compatibility -- they are "Valid*" not "Valid" and have "IA-32 Architecture Compatibility" sections that say "not supported on Intel processors earlier than ...".)

EDIT: I missed exceptions sections #130552 (comment)

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jethrogb commented Sep 19, 2024

Just the “valid” note is not sufficient. In the instruction description under 64-mode exceptions, it says:

#UD If CPUID.01H:ECX.CMPXCHG16B[bit 13] = 0.

Which indicates that CPU support is not guaranteed in general.

@wesleywiser wesleywiser added S-waiting-on-author Status: This is awaiting some action (such as code changes or more information) from the author. and removed S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels Oct 11, 2024
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@taiki-e
ping from triage - can you post your status on this PR? There hasn't been an update in a few months. Thanks!

FYI: when a PR is ready for review, send a message containing
@rustbot ready to switch to S-waiting-on-review so the PR is in the reviewer's backlog.

@LFS6502 LFS6502 added S-waiting-on-author Status: This is awaiting some action (such as code changes or more information) from the author. and removed S-waiting-on-author Status: This is awaiting some action (such as code changes or more information) from the author. labels Mar 1, 2025
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