cppc: add support to CPPC extension

CHANGELOG.md

@@ -10,6 +10,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/),
 
 - `Physical` shared memory physical address range with type annotation in Chapter 3
 - Support to RISC-V SBI System Suspend extension
+- Support to CPPC extension
 
 ### Modified
 

src/cppc.rs

@@ -0,0 +1,25 @@
+//! Chapter 14. CPPC Extension (EID #0x43505043 "CPPC")
+
+/// Extension ID for CPPC Extension.
+pub const EID_CPPC: usize = crate::eid_from_str("CPPC") as _;
+pub use fid::*;
+
+/// Declared in §14.
+mod fid {
+    /// Function ID to probe a CPPC register.
+    ///
+    /// Declared in §14.1.
+    pub const PROBE: usize = 0;
+    /// Function ID to read CPPC register bits.
+    ///
+    /// Declared in §14.2.
+    pub const READ: usize = 1;
+    /// Function ID to read high bits of a CPPC register.
+    ///
+    /// Declared in §14.3.
+    pub const READ_HI: usize = 2;
+    /// Function ID to write to a CPPC register.
+    ///
+    /// Declared in §14.4.
+    pub const WRITE: usize = 3;
+}

src/lib.rs

@@ -40,6 +40,8 @@ pub mod pmu;
 pub mod dbcn;
 // §13
 pub mod susp;
+// §14
+pub mod cppc;
 
 /// Converts SBI EID from str.
 const fn eid_from_str(name: &str) -> i32 {
@@ -200,4 +202,14 @@ mod tests {
         const_assert_eq!(0x53555350, EID_SUSP);
         const_assert_eq!(0, SUSPEND);
     }
+    // §14
+    #[test]
+    fn test_cppc() {
+        use crate::cppc::*;
+        const_assert_eq!(0x43505043, EID_CPPC);
+        const_assert_eq!(0, PROBE);
+        const_assert_eq!(1, READ);
+        const_assert_eq!(2, READ_HI);
+        const_assert_eq!(3, WRITE);
+    }
 }