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1. icarium icarium Public

   Trying to implement a soft core SoC

   Verilog 4

2. wishbone wishbone Public

   Trying to learn Wishbone by implementing few master/slave devices

   SystemVerilog 10 3

3. ben-cpu ben-cpu Public

   My lousy attempt at implementing the great Ben Eater's 8-bit CPU.

   Verilog

4. leoman leoman Public

   My "operating" system

   C 1