[Profile separation] MMU infrastructure update for TD2 #12626
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Signed-off-by: Neetha John <nejo@microsoft.com>
Signed-off-by: Neetha John <nejo@microsoft.com>
Signed-off-by: Neetha John <nejo@microsoft.com>
Signed-off-by: Neetha John <nejo@microsoft.com>
Signed-off-by: Neetha John <nejo@microsoft.com>
Signed-off-by: Neetha John <nejo@microsoft.com>
Signed-off-by: Neetha John <nejo@microsoft.com>
Signed-off-by: Neetha John <nejo@microsoft.com>
Signed-off-by: Neetha John <nejo@microsoft.com>
Signed-off-by: Neetha John <nejo@microsoft.com>
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yxieca
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Nov 11, 2022
yxieca
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Signed-off-by: Neetha John <nejo@microsoft.com> Why I did it There is a need to have separate profiles on compute and storage and this infra update will help achieve that How I did it Moved buffer pool/profile and qos definitions on TD2 to a common folder and all TD2 hwsku's will reference that folder
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Signed-off-by: Neetha John <nejo@microsoft.com> This is to backport #12626 Why I did it There is a need to have separate profiles on compute and storage and this infra update will help achieve that How I did it Moved buffer pool/profile and qos definitions on TD2 to a common folder and all TD2 hwsku's will reference that folder
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Resolved merge conflicts in the following files manually device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32-Flex/buffers_defaults_t0.j2 device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32-Flex/buffers_defaults_t1.j2 device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/buffers_defaults_t0.j2 device/arista/x86_64-arista_7050_qx32/Arista-7050-QX32/buffers_defaults_t1.j2 device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/buffers_defaults_t0.j2 device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/buffers_defaults_t1.j2 device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers_defaults_t0.j2 device/dell/x86_64-dell_s6000_s1220-r0/Force10-S6000/buffers_defaults_t1.j2 src/sonic-config-engine/tests/test_j2files.py Related work items: sonic-net#11864, sonic-net#12585, sonic-net#12607, sonic-net#12619, sonic-net#12626, sonic-net#12707, sonic-net#12714, sonic-net#12729, sonic-net#12733, sonic-net#12736, sonic-net#12750, sonic-net#12751, sonic-net#12755, sonic-net#12757, sonic-net#12758, sonic-net#12760, sonic-net#12761, sonic-net#12769, sonic-net#12783
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…rnal-202012 branch Related work items: sonic-net#2108, sonic-net#2560, sonic-net#9486, sonic-net#12325, sonic-net#12626, sonic-net#12739, sonic-net#12835, sonic-net#12836, sonic-net#12865, sonic-net#12880, sonic-net#12903, sonic-net#12914, sonic-net#12922, sonic-net#12925, sonic-net#12930, sonic-net#12989, sonic-net#12990, sonic-net#13006, sonic-net#13014, sonic-net#13040, sonic-net#13092, sonic-net#13124, sonic-net#13132, sonic-net#13146, sonic-net#13157, sonic-net#13168, sonic-net#13175, sonic-net#13177, sonic-net#13182, sonic-net#13188, sonic-net#13226, sonic-net#13233, sonic-net#13244, sonic-net#13249
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Why I did it
There is a need to have separate profiles on compute and storage and this infra update will help achieve that
How I did it
Moved buffer pool/profile and qos definitions on TD2 to a common folder and all TD2 hwsku's will reference that folder
How to verify it
Which release branch to backport (provide reason below if selected)