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🧪 Use xpack risc-v gcc as default prebuilt toolchain #1091

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17 changes: 9 additions & 8 deletions .github/workflows/Processor.yml
Original file line number Diff line number Diff line change
Expand Up @@ -32,30 +32,31 @@ jobs:
- name: '🧰 Repository Checkout'
uses: actions/checkout@v4

- name: '📦 Install RISC-V GCC'
- name: '📦 Install xPack RISC-V GCC'
run: |
wget -q https://github.com/stnolting/riscv-gcc-prebuilt/releases/download/rv32i-131023/riscv32-unknown-elf.gcc-13.2.0.tar.gz
wget -q https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v14.2.0-2/xpack-riscv-none-elf-gcc-14.2.0-2-linux-x64.tar.gz
mkdir $GITHUB_WORKSPACE/riscv-gcc
tar -xzf riscv32-unknown-elf.gcc-13.2.0.tar.gz -C $GITHUB_WORKSPACE/riscv-gcc
echo $GITHUB_WORKSPACE/riscv-gcc/bin >> $GITHUB_PATH
tar -xzf xpack-riscv-none-elf-gcc-14.2.0-2-linux-x64.tar.gz -C $GITHUB_WORKSPACE/riscv-gcc
echo $GITHUB_WORKSPACE/riscv-gcc/xpack-riscv-none-elf-gcc-14.2.0-2/bin >> $GITHUB_PATH

- name: '📦 Install GHDL'
uses: ghdl/setup-ghdl-ci@nightly

- name: '🔍 Check tools'
run: |
riscv32-unknown-elf-gcc -v
riscv-none-elf-gcc -v
ghdl -v

- name: '⚙️ Build Software Framework Tests'
run: |
make -C sw/example/processor_check check
make -C sw/example clean_all exe
make -C sw/bootloader clean_all info bootloader
make RISCV_PREFIX=riscv-none-elf- -C sw/example/processor_check check
make RISCV_PREFIX=riscv-none-elf- -C sw/example clean_all exe
make RISCV_PREFIX=riscv-none-elf- -C sw/bootloader clean_all info bootloader

- name: '🚧 Compile executable and run simulation'
run: |
make -C sw/example/${{ matrix.example }} \
RISCV_PREFIX=riscv-none-elf- \
USER_FLAGS+="-DUART0_SIM_MODE -DUART1_SIM_MODE" \
clean_all \
info \
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1 change: 1 addition & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,7 @@ mimpid = 0x01040312 -> Version 01.04.03.12 -> v1.4.3.12

| Date | Version | Comment | Ticket |
|:----:|:-------:|:--------|:------:|
| 10.11.2024 | 1.10.6.5 | :warning: switch to [xPack](https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack) as default prebuilt RISC-V GCC toolchain (now using `riscv-none-elf-` as default gcc prefix) | [#1091](https://github.com/stnolting/neorv32/pull/1091) |
| 10.11.2024 | 1.10.6.4 | rework default processor testbench | [#1093](https://github.com/stnolting/neorv32/pull/1093) |
| 06.11.2024 | 1.10.6.3 | minor rtl edits and cleanups | [#1090](https://github.com/stnolting/neorv32/pull/1090) |
| 02.11.2024 | 1.10.6.2 | :warning: rework processor boot configuration; add new boot-configuration generics | [#1086](https://github.com/stnolting/neorv32/pull/1086) |
Expand Down
2 changes: 1 addition & 1 deletion docs/datasheet/software.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -220,7 +220,7 @@ Variables:
APP_INC - C include folder(s) [append only]: "-I ."
APP_SRC - C source folder(s) [append only]: "./main.c "
ASM_INC - ASM include folder(s) [append only]: "-I ."
RISCV_PREFIX - Toolchain prefix: "riscv32-unknown-elf-"
RISCV_PREFIX - Toolchain prefix: "riscv-none-elf-"
NEORV32_HOME - NEORV32 home folder: "../../.."
GDB_ARGS - GDB (connection) arguments: "-ex target extended-remote localhost:3333"
GHDL_RUN_FLAGS - GHDL simulation run arguments: ""
Expand Down
88 changes: 37 additions & 51 deletions docs/userguide/sw_toolchain_setup.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -2,85 +2,71 @@
:sectnums:
== Software Toolchain Setup

To compile (and debug) executables for the NEORV32 a RISC-V toolchain is required.
There are two possibilities to get this:
To compile (and debug) executables for the NEORV32 a RISC-V-compatible toolchain is required.
By default, the project's software framework uses the GNU C Compiler RISC-V port "RISC-V GCC".
Basically, there are two options to obtain such a toolchain:

1. Download and _build_ the official RISC-V GNU toolchain yourself.
2. Download and install a prebuilt version of the toolchain; this might also done via the package manager / app store of your OS
1. Download and _build_ the RISC-V GNU toolchain by yourself.
2. Download and _install_ a **prebuilt** version of the toolchain.

.Default GCC Prefix
[NOTE]
The default toolchain prefix (`RISCV_PREFIX` variable) for this project is **`riscv32-unknown-elf-`**. Of course you can use any other RISC-V
toolchain (like `riscv64-unknown-elf-`) that is capable to emit code for a `rv32` architecture. Just change `RISCV_PREFIX`
according to your needs.
The default toolchain prefix for this project is **`riscv-none-elf-`** (`RISCV_PREFIX` variable).


:sectnums:
=== Building the Toolchain from Scratch
**Toolchain Requirements**

[start=1]
.The toolchain must be able to emit code for a 32-bit architecture (i.e. `mabi=rv32`).
.A "bare metal" / stand-alone C standard library should be used (i.e. the no-Linux version; for example "Newlib").

.Library/ISA Considerations
[IMPORTANT]
Note that a toolchain build with `--with-arch=rv32imc` provides library code (like the C standard library)
compiled entirely using compressed (`C`) and `mul`/`div` instructions (`M`). Hence, this pre-compiled library
code CANNOT be executed (without emulation) on an architecture that does not support these ISA extensions.


To build the toolchain by yourself you can follow the guide from the official https://github.com/riscv-collab/riscv-gnu-toolchain GitHub page.
You need to make sure the generated toolchain fits the architecture of the NEORV32 core. To get a toolchain that even supports minimal
ISA extension configurations, it is recommend to compile for `rv32i` only. Please note that this minimal ISA also provides further ISA
extensions like `m` or `c`. Of course you can use a _multilib_ approach to generate toolchains for several target ISAs at once.
**Building the Toolchain from Scratch**

.Preparing GCC build for `rv32i` (minimal ISA)
The official RISC-V GCC GitHub repository (https://github.com/riscv-collab/riscv-gnu-toolchain) provides instructions
for building the toolchain from scratch:

.Preparing GCC build for `rv32i` (minimal ISA only in this example)
[source,bash]
----
$ git clone https://github.com/riscv/riscv-gnu-toolchain
$ cd riscv-gnu-toolchain

$ riscv-gnu-toolchain$ ./configure --prefix=/opt/riscv --with-arch=rv32i --with-abi=ilp32
$ riscv-gnu-toolchain$ make
----

[IMPORTANT]
Keep in mind that - for instance - a toolchain build with `--with-arch=rv32imc` provides library code (like the C
standard library) compiled entirely utilizing compressed (`C`) and `mul`/`div` instructions (`M`). Hence, this
code CANNOT be executed (without emulation) on an architecture that does not support these ISA extensions.

**Downloading and Installing a Prebuilt Toolchain**

:sectnums:
=== Downloading and Installing a Prebuilt Toolchain
Alternatively, a prebuilt toolchain can be used. Some OS package managers provide embedded RISC-V GCC toolchain.
However, I can highly recommend the toolchain provided by the X-Pack project (MIT license):
https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack

Alternatively, you can download a prebuilt toolchain.

:sectnums:
==== Use The Pre-Built Toolchains
**Toolchain Installation**

We have compiled several GCC toolchains on a 64-bit x86 Ubuntu (Ubuntu on Windows, actually) and uploaded it to
GitHub. You can directly download the according toolchain archive as single _zip-file_ within a packed
release from https://github.com/stnolting/riscv-gcc-prebuilt. More information about downloading and installing
these prebuilt toolchains can be found in the repository's README.


:sectnums:
==== Use a Third Party Toolchain

Of course you can also use any other prebuilt version of the toolchain. There are a lot RISC-V GCC packages out there -
even for Windows. On Linux system you might even be able to fetch a toolchain via your distribution's package manager.

[IMPORTANT]
Make sure the toolchain can (also) emit code for a `rv32i` architecture, uses the `ilp32` or `ilp32e` ABI and **was not build** using
CPU extensions that are not supported by the NEORV32 (like `D`).


:sectnums:
=== Installation

Now you have the toolchain binaries. The last step is to add them to your `PATH` environment variable (if you have not
already done so): make sure to add the _binaries_ folder (`bin`) of your toolchain.
To integrate the toolchain of choice into the NEORV32 software framework, the toolchain's binaries need
to be added to the system path (e.g. `PATH` environment variable) so they can be used by a shell. Therefore,
the absolute path to the toolchain's `bin` folder has to be appended to the `PATH` variable:

[source,bash]
----
$ export PATH=$PATH:/opt/riscv/bin
----

You should add this command to your `.bashrc` (if you are using bash) to automatically add the RISC-V
.bashrc
[TIP]
This command can be added to `.bashrc` (or similar) to automatically add the RISC-V
toolchain at every console start.

:sectnums:
=== Testing the Installation

To make sure everything works fine, navigate to an example project in the NEORV32 example folder and
To make sure everything works fine, navigate to an example project in the NEORV32 `sw/example` folder and
execute the following command:

[source,bash]
Expand All @@ -89,4 +75,4 @@ neorv32/sw/example/demo_blink_led$ make check
----

This will test all the tools required for generating NEORV32 executables.
Everything is working fine if `Toolchain check OK` appears at the end.
Everything is working fine if "Toolchain check OK" appears at the end of the log output.
2 changes: 1 addition & 1 deletion rtl/core/neorv32_package.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@ package neorv32_package is

-- Architecture Constants -----------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01100604"; -- hardware version
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01100605"; -- hardware version
constant archid_c : natural := 19; -- official RISC-V architecture ID
constant XLEN : natural := 32; -- native data path width

Expand Down
4 changes: 2 additions & 2 deletions sw/common/common.mk
Original file line number Diff line number Diff line change
Expand Up @@ -25,8 +25,8 @@ ASM_INC ?= -I .
# Optimization
EFFORT ?= -Os

# Compiler toolchain
RISCV_PREFIX ?= riscv32-unknown-elf-
# Compiler toolchain prefix
RISCV_PREFIX ?= riscv-none-elf-

# CPU architecture and ABI
MARCH ?= rv32i_zicsr_zifencei
Expand Down
4 changes: 3 additions & 1 deletion sw/example/dhrystone/README.md
Original file line number Diff line number Diff line change
@@ -1,7 +1,9 @@
## Dhrystone Benchmark

**:warning: The Dhrystone port is outdated. Have a look at the CoreMark port for benchmarking.**

:copyright: Original sources from [https://github.com/sifive/benchmark-dhrystone](https://github.com/sifive/benchmark-dhrystone);
see `LICENSE` file. The origianl source code has been modified for the NEORV32 RISC-V Processor.
see `LICENSE` file. The original source code has been modified for the NEORV32 RISC-V Processor.

To compile the `main.exe` executable:

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -54,12 +54,10 @@

#define __USE_GNU

#include <fenv.h>
//#pragma STDC FENV_ACCESS ON

#define _GNU_SOURCE

#include <float.h>
#include <fenv.h>
#include <math.h>


Expand Down Expand Up @@ -130,37 +128,6 @@ uint32_t get_hw_exceptions(void) {
}


/**********************************************************************//**
* Get exception flags from C runtime (floating-point emulation).
*
* @warning WORK-IN-PROGRESS!
*
* @return Floating point exception status word.
**************************************************************************/
uint32_t get_sw_exceptions(void) {

const uint32_t FP_EXC_NV_C = 1 << 0; // invalid operation
const uint32_t FP_EXC_DZ_C = 1 << 1; // divide by zero
const uint32_t FP_EXC_OF_C = 1 << 2; // overflow
const uint32_t FP_EXC_UF_C = 1 << 3; // underflow
const uint32_t FP_EXC_NX_C = 1 << 4; // inexact

int fpeRaised = fetestexcept(FE_ALL_EXCEPT);

uint32_t res = 0;

if (fpeRaised & FE_INVALID) { res |= FP_EXC_NV_C; }
if (fpeRaised & FE_DIVBYZERO) { res |= FP_EXC_DZ_C; }
if (fpeRaised & FE_OVERFLOW) { res |= FP_EXC_OF_C; }
if (fpeRaised & FE_UNDERFLOW) { res |= FP_EXC_UF_C; }
if (fpeRaised & FE_INEXACT) { res |= FP_EXC_NX_C; }

feclearexcept(FE_ALL_EXCEPT);

return res;
}


// ################################################################################################
// "Intrinsics"
// ################################################################################################
Expand Down
4 changes: 2 additions & 2 deletions sw/example/makefile
Original file line number Diff line number Diff line change
Expand Up @@ -6,8 +6,8 @@ TOPTARGETS := exe clean_all check info all
SUBDIRS := $(wildcard */.)
# ignore dummy folders (starting with '~')
EXCLDIR := $(wildcard ~*/.)
# ignore the Eclipse project
EXCLDIR += eclipse/.
# ignore some of the default projects/examples
EXCLDIR += eclipse/. dhrystone/. performance_tests/. float_corner_test/.
SUBDIRS := $(filter-out $(EXCLDIR), $(SUBDIRS))

$(TOPTARGETS): $(SUBDIRS)
Expand Down
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