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Rework default testbench #1093

Merged
merged 10 commits into from
Nov 9, 2024
Merged

Rework default testbench #1093

merged 10 commits into from
Nov 9, 2024

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stnolting
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The testbench was an artifact of the very early days of this project. This PR provides a full make-over to cleanup the testbench and to make it more flexible.

⚠️ Rename UART simulation-mode log file names:

  • neorv32.uart0.sim_mode.text.out -> neorv32.uart0_sim_mode.out
  • neorv32.uart1.sim_mode.text.out -> neorv32.uart1_sim_mode.out

@stnolting stnolting added optimization Make things faster, smaller and more efficient cleanup Clean-up the codebase labels Nov 9, 2024
@stnolting stnolting self-assigned this Nov 9, 2024
@stnolting stnolting marked this pull request as ready for review November 9, 2024 23:51
@stnolting stnolting merged commit f1ee1bd into main Nov 9, 2024
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@stnolting stnolting deleted the rework_testbench branch November 9, 2024 23:56
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