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Updated FIFO NULL assertion fix #778

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merged 4 commits into from
Jan 28, 2024
Merged

Updated FIFO NULL assertion fix #778

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1376f33
NULL assertion fix in FIFO
mikaelsky Jan 28, 2024
c5cd9e7
Merge pull request #2 from mikaelsky/mikaelsky-patch-2
mikaelsky Jan 28, 2024
8d3078d
[fifo] minor comment edits
stnolting Jan 28, 2024
5404d30
update version to v1.9.3.7
stnolting Jan 28, 2024
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1 change: 1 addition & 0 deletions CHANGELOG.md
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Expand Up @@ -30,6 +30,7 @@ mimpid = 0x01040312 -> Version 01.04.03.12 -> v1.4.3.12

| Date | Version | Comment | Link |
|:----:|:-------:|:--------|:----:|
| 28.01.2024 | 1.9.3.7 | FIFO module _NULL assertion_ fix | [#778](https://github.com/stnolting/neorv32/pull/778) |
| 27.01.2024 | 1.9.3.6 | improve CPU's front end (instruction fetch) increasing overall performance | [#777](https://github.com/stnolting/neorv32/pull/777) |
| 27.01.2024 | 1.9.3.5 | :bug: fix typo that renders the clock gating (added in v1.9.3.4) useless: CPU sleep output stuck at zero | [#776](https://github.com/stnolting/neorv32/pull/776) |
| 24.01.2024 | 1.9.3.4 | :sparkles: add optional CPU clock gating (via new generic `CLOCK_GATING_EN`): shut down the CPU clock during sleep mode; :warning: add new HDL design file for the clock gate (`neorv32_clockgate.vhd`) | [#775](https://github.com/stnolting/neorv32/pull/775) |
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21 changes: 17 additions & 4 deletions rtl/core/neorv32_fifo.vhd
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Expand Up @@ -145,7 +145,11 @@ begin
fifo_mem <= (others => (others => '0')); -- full reset of memory cells
elsif rising_edge(clk_i) then
if (we = '1') then
fifo_mem(to_integer(unsigned(w_pnt(w_pnt'left-1 downto 0)))) <= wdata_i;
if (fifo_depth_c > 1) then -- prevent a NULL assertion for fifo_depth_c of 1
fifo_mem(to_integer(unsigned(w_pnt(w_pnt'left-1 downto 0)))) <= wdata_i;
else
fifo_mem(0) <= wdata_i;
end if;
end if;
end if;
end process fifo_write;
Expand All @@ -157,7 +161,11 @@ begin
begin
if rising_edge(clk_i) then
if (we = '1') then
fifo_mem(to_integer(unsigned(w_pnt(w_pnt'left-1 downto 0)))) <= wdata_i;
if (fifo_depth_c > 1) then-- prevent a NULL assertion for fifo_depth_c of 1
fifo_mem(to_integer(unsigned(w_pnt(w_pnt'left-1 downto 0)))) <= wdata_i;
else
fifo_mem(0) <= wdata_i;
end if;
end if;
end if;
end process fifo_write;
Expand All @@ -168,7 +176,8 @@ begin
-- -------------------------------------------------------------------------------------------
fifo_read_async: -- asynchronous read
if not FIFO_RSYNC generate
rdata_o <= fifo_mem(to_integer(unsigned(r_pnt(r_pnt'left-1 downto 0))));
-- prevent a NULL assertion for fifo_depth_c of 1 --
rdata_o <= fifo_mem(to_integer(unsigned(r_pnt(r_pnt'left-1 downto 0)))) when (fifo_depth_c > 1) else fifo_mem(0);
-- status --
free_o <= free;
avail_o <= avail;
Expand All @@ -180,7 +189,11 @@ begin
sync_read: process(clk_i)
begin
if rising_edge(clk_i) then
rdata_o <= fifo_mem(to_integer(unsigned(r_pnt(r_pnt'left-1 downto 0))));
if (fifo_depth_c > 1) then -- prevent a NULL assertion for fifo_depth_c of 1
rdata_o <= fifo_mem(to_integer(unsigned(r_pnt(r_pnt'left-1 downto 0))));
else
rdata_o <= fifo_mem(0);
end if;
end if;
end process sync_read;
-- status --
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2 changes: 1 addition & 1 deletion rtl/core/neorv32_package.vhd
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Expand Up @@ -56,7 +56,7 @@ package neorv32_package is

-- Architecture Constants -----------------------------------------------------------------
-- -------------------------------------------------------------------------------------------
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01090306"; -- hardware version
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01090307"; -- hardware version
constant archid_c : natural := 19; -- official RISC-V architecture ID
constant XLEN : natural := 32; -- native data path width

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