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Fuse reordered lw/sw instructions #240

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merged 1 commit into from
Oct 5, 2023

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Originally, we only fused lw/sw insturciton with continuous memory address. However, some lw/sw instruction cannot be fused because of compiler reordering. For example:

108e8: 01312e23 sw s3,28(sp)
108ec: 02112623 sw ra,44(sp)
108f0: 02812423 sw s0,40(sp)
108f4: 02912223 sw s1,36(sp)
108f8: 03212023 sw s2,32(sp)
108fc: 01412c23 sw s4,24(sp)

To fuse more lw/sw instructions taht reordered by compile, we need to relax the restriction. With this modification, we can fuse reordered lw/sw instructions.

Close: #218

Originally, we only fused lw/sw insturciton with continuous memory
address. However, some lw/sw instruction cannot be fused because of
compiler reordering. For example:

108e8: 01312e23 sw s3,28(sp)
108ec: 02112623 sw ra,44(sp)
108f0: 02812423 sw s0,40(sp)
108f4: 02912223 sw s1,36(sp)
108f8: 03212023 sw s2,32(sp)
108fc: 01412c23 sw s4,24(sp)

To fuse more lw/sw instructions taht reordered by compile, we need to
relax the restriction. With this modification, we can fuse reordered
lw/sw instructions.
@jserv jserv changed the title Modify fused lw/sw instruction Fuse reordered lw/sw instructions Oct 5, 2023
@jserv jserv merged commit 47f8536 into sysprog21:master Oct 5, 2023
@qwe661234
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I observed a performance improvement on my host computer when running Dhrystone, but the benchmark results indicate a performance loss.

@qwe661234 qwe661234 deleted the modify_lwsw_fuse branch October 7, 2023 05:29
vestata pushed a commit to vestata/rv32emu that referenced this pull request Jan 24, 2025
Originally, we only fused LW/SW instructions with continuous memory
addresses. However, some LW/SW instructions cannot be fused due to
compiler instruction reordering. For example:
  108e8: 01312e23 sw s3, 28(sp)
  108ec: 02112623 sw ra, 44(sp)
  108f0: 02812423 sw s0, 40(sp)
  108f4: 02912223 sw s1, 36(sp)
  108f8: 03212023 sw s2, 32(sp)
  108fc: 01412c23 sw s4, 24(sp)

To fuse more lw/sw instructions that are reordered by the compiler, we
need to relax the restriction. With this modification, we can fuse
reordered LW/SW instructions.

Close sysprog21#218
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macro operation fusion: addi + sw / lw + addi
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