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Add support of FCLASS.S #47
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Amend the git commit message to render the results of RISC-V Architectural Tests.
/* 0x080 rs1 is +INF */ | ||
out |= (f == 0x7f800000) ? 0x080 : 0; | ||
out |= (expn == FMASK_EXPN && !frac && !sign) ? 0x080 : 0; |
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Shall we update the description of these comments?
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How should I update the description?
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Explicitly mentioning signedness checks would be better.
Print the input and output of fclass:
|
Instead of dumping the difference in the signature, you should rewrite down the descriptive text in human-readable form. That is, you can summarize the riscv-arch-test reports. |
There is a difference in the signature of fclass_b1-01. When getting 0x80000000 as input, the expected output is 0x00000000, while our emulator output is 0x00000008. However, in another testcase of the same input, the expected output is 0x00000008.
I amended the commit message, and further issues should be confirmed later. |
There is a difference in the signature of fclass_b1-01. When getting 0x80000000 as input, the expected output is 0x00000000, while rv32emu generates 0x00000008. In another test case of the same input, the expected output is 0x00000008.
No description provided.