Implementation of the Phylogenetic Liklihood Function for the AMD Versal architecture (FPGA and AI processors on same SoC).
-
Updated
Nov 27, 2024 - C++
Implementation of the Phylogenetic Liklihood Function for the AMD Versal architecture (FPGA and AI processors on same SoC).
Add a description, image, and links to the plf topic page so that developers can more easily learn about it.
To associate your repository with the plf topic, visit your repo's landing page and select "manage topics."