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Fix VLSI CI - Fix conda environment creation #1963

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merged 1 commit into from
Aug 5, 2024
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@abejgonzalez abejgonzalez commented Aug 5, 2024

  • Pin SRAM macros repo for SKY130 to a specific commit
  • Update VLSI CI conda env creation to use specific channels directly instead of modifying the base environment before/after creating new environments. This avoids CI modifying the base conda environment / making it more robust.

Related PRs / Issues:

Type of change:

  • Bug fix
  • New feature
  • Other enhancement

Impact:

  • RTL change
  • Software change (RISC-V software)
  • Build system change
  • Other

Contributor Checklist:

  • Did you set main as the base branch?
  • Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
  • Did you state the type-of-change/impact?
  • Did you delete any extraneous prints/debugging code?
  • Did you mark the PR with a changelog: label?
  • (If applicable) Did you update the conda .conda-lock.yml file if you updated the conda requirements file?
  • (If applicable) Did you add documentation for the feature?
  • (If applicable) Did you add a test demonstrating the PR?
  • (If applicable) Did you mark the PR as Please Backport?

@abejgonzalez abejgonzalez requested a review from jerryz123 August 5, 2024 05:29
@abejgonzalez abejgonzalez self-assigned this Aug 5, 2024
@abejgonzalez abejgonzalez changed the title Full flow fixes Fix VLSI CI - Fix conda environment creation Aug 5, 2024
@abejgonzalez abejgonzalez merged commit f259123 into main Aug 5, 2024
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@abejgonzalez abejgonzalez deleted the full-flow-fixes branch August 6, 2024 21:37
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2 participants