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Initial Value and Lint Fixes #122

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merged 2 commits into from
Feb 23, 2024
Merged

Initial Value and Lint Fixes #122

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23cc116
Reset fix for packet_boundary
azaidy Feb 23, 2024
84e1525
Clean lint
azaidy Feb 23, 2024
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2 changes: 1 addition & 1 deletion umi/rtl/umi_fifo_flex.v
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Original file line number Diff line number Diff line change
Expand Up @@ -385,7 +385,7 @@ module umi_fifo_flex

always @(posedge umi_in_clk or negedge umi_in_nreset)
if (~umi_in_nreset)
packet_latch_eom <= 1'b0;
packet_latch_eom <= 1'b1;
else if (umi_in_ready & umi_in_valid)
packet_latch_eom <= umi_in_cmd_eom;

Expand Down
3 changes: 2 additions & 1 deletion utils/rtl/umi2tl_np.v
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Expand Up @@ -170,7 +170,8 @@ module umi2tl_np #(
);

// Calculate byte shift needed
wire [7:0] req_bytes = (1 << fifoflex_out_req_cmd_size)*(fifoflex_out_req_cmd_len + 1);
wire [8:0] fifoflex_out_req_cmd_len_plus_one = fifoflex_out_req_cmd_len + 1;
wire [15:0] req_bytes = {7'b0, fifoflex_out_req_cmd_len_plus_one} << fifoflex_out_req_cmd_size;

reg [2:0] masked_shift;
reg [2:0] masked_tl_a_size;
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13 changes: 7 additions & 6 deletions utils/rtl/umi_packet_merge_greedy.v
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Expand Up @@ -148,7 +148,7 @@ module umi_packet_merge_greedy #(
wire umi_in_ready_r;
wire umi_in_cmd_commit_r;

reg [7:0] byte_counter;
reg [15:0] byte_counter;
localparam [$clog2(ODW/8):0] ODW_BYTES = ODW[3+$clog2(ODW/8):3];
localparam ADDR_PAD_BYTES = AW - 1 - $clog2(ODW/8);

Expand Down Expand Up @@ -236,9 +236,9 @@ module umi_packet_merge_greedy #(
wire umi_in_opcode_check;
wire umi_in_field_match;
wire umi_in_mergeable;
wire [7:0] umi_in_bytes;
wire [15:0] umi_in_bytes;
reg umi_in_mergeable_r;
reg [7:0] umi_in_bytes_r;
reg [15:0] umi_in_bytes_r;

reg [AW-1:0] umi_in_dstaddr_nx;
reg [AW-1:0] umi_in_srcaddr_nx;
Expand Down Expand Up @@ -266,7 +266,8 @@ module umi_packet_merge_greedy #(
umi_in_opcode_check &
umi_in_field_match;

assign umi_in_bytes = (1 << umi_in_cmd_size)*(umi_in_cmd_len + 1);
wire [8:0] umi_in_cmd_len_plus_one = umi_in_cmd_len + 1;
assign umi_in_bytes = {7'b0, umi_in_cmd_len_plus_one} << umi_in_cmd_size;

always @(posedge clk or negedge nreset) begin
if (~nreset)
Expand Down Expand Up @@ -386,7 +387,7 @@ module umi_packet_merge_greedy #(
end
end

wire [7:0] umi_out_cmd_len_m;
wire [15:0] umi_out_cmd_len_m;

assign umi_out_cmd_len_m = (byte_counter >> umi_out_cmd_size_r) - 1;

Expand All @@ -396,7 +397,7 @@ module umi_packet_merge_greedy #(
// Command inputs
.cmd_opcode (umi_out_cmd_opcode_r),
.cmd_size (umi_out_cmd_size_r),
.cmd_len (umi_out_cmd_len_m),
.cmd_len (umi_out_cmd_len_m[7:0]),
.cmd_atype (umi_out_cmd_atype_r),
.cmd_qos (umi_out_cmd_qos_r),
.cmd_prot (umi_out_cmd_prot_r),
Expand Down