std.sync.atomic: extended atomic helper functions

CMakeLists.txt

@@ -337,8 +337,7 @@ set(ZIG_STAGE2_SOURCES
     "${CMAKE_SOURCE_DIR}/lib/std/array_list.zig"
     "${CMAKE_SOURCE_DIR}/lib/std/ascii.zig"
     "${CMAKE_SOURCE_DIR}/lib/std/atomic.zig"
-    "${CMAKE_SOURCE_DIR}/lib/std/atomic/bool.zig"
-    "${CMAKE_SOURCE_DIR}/lib/std/atomic/int.zig"
+    "${CMAKE_SOURCE_DIR}/lib/std/atomic/Atomic.zig"
     "${CMAKE_SOURCE_DIR}/lib/std/atomic/queue.zig"
     "${CMAKE_SOURCE_DIR}/lib/std/atomic/stack.zig"
     "${CMAKE_SOURCE_DIR}/lib/std/base64.zig"

lib/std/Thread.zig

@@ -67,33 +67,7 @@ else switch (std.Target.current.os.tag) {
     else => struct {},
 };
 
-/// Signals the processor that it is inside a busy-wait spin-loop ("spin lock").
-pub inline fn spinLoopHint() void {
-    switch (std.Target.current.cpu.arch) {
-        .i386, .x86_64 => {
-            asm volatile ("pause" ::: "memory");
-        },
-        .arm, .armeb, .thumb, .thumbeb => {
-            // `yield` was introduced in v6k but are also available on v6m.
-            const can_yield = comptime std.Target.arm.featureSetHasAny(std.Target.current.cpu.features, .{ .has_v6k, .has_v6m });
-            if (can_yield) asm volatile ("yield" ::: "memory")
-            // Fallback.
-            else asm volatile ("" ::: "memory");
-        },
-        .aarch64, .aarch64_be, .aarch64_32 => {
-            asm volatile ("isb" ::: "memory");
-        },
-        .powerpc64, .powerpc64le => {
-            // No-op that serves as `yield` hint.
-            asm volatile ("or 27, 27, 27" ::: "memory");
-        },
-        else => {
-            // Do nothing but prevent the compiler from optimizing away the
-            // spinning loop.
-            asm volatile ("" ::: "memory");
-        },
-    }
-}
+pub const spinLoopHint = @compileError("deprecated: use std.atomic.spinLoopHint");
 
 /// Returns the ID of the calling thread.
 /// Makes a syscall every time the function is called.
@@ -597,8 +571,13 @@ pub fn getCurrentThreadId() u64 {
     }
 }
 
-test {
+test "std.Thread" {
     if (!builtin.single_threaded) {
-        std.testing.refAllDecls(@This());
+        _ = AutoResetEvent;
+        _ = ResetEvent;
+        _ = StaticResetEvent;
+        _ = Mutex;
+        _ = Semaphore;
+        _ = Condition;
     }
 }

lib/std/Thread/Condition.zig

@@ -115,7 +115,7 @@ pub const AtomicCondition = struct {
                             else => unreachable,
                         }
                     },
-                    else => spinLoopHint(),
+                    else => std.atomic.spinLoopHint(),
                 }
             }
         }

lib/std/Thread/Mutex.zig

@@ -126,7 +126,7 @@ pub const AtomicMutex = struct {
 
             var iter = std.math.min(32, spin + 1);
             while (iter > 0) : (iter -= 1)
-                std.Thread.spinLoopHint();
+                std.atomic.spinLoopHint();
         }
 
         new_state = .waiting;
@@ -149,7 +149,7 @@ pub const AtomicMutex = struct {
                         else => unreachable,
                     }
                 },
-                else => std.Thread.spinLoopHint(),
+                else => std.atomic.spinLoopHint(),
             }
         }
     }

lib/std/Thread/StaticResetEvent.zig

@@ -182,7 +182,7 @@ pub const AtomicEvent = struct {
                 timer = time.Timer.start() catch return error.TimedOut;
 
             while (@atomicLoad(u32, waiters, .Acquire) != WAKE) {
-                std.os.sched_yield() catch std.Thread.spinLoopHint();
+                std.os.sched_yield() catch std.atomic.spinLoopHint();
                 if (timeout) |timeout_ns| {
                     if (timer.read() >= timeout_ns)
                         return error.TimedOut;
@@ -293,7 +293,7 @@ pub const AtomicEvent = struct {
                         return @intToPtr(?windows.HANDLE, handle);
                     },
                     LOADING => {
-                        std.os.sched_yield() catch std.Thread.spinLoopHint();
+                        std.os.sched_yield() catch std.atomic.spinLoopHint();
                         handle = @atomicLoad(usize, &event_handle, .Monotonic);
                     },
                     else => {

lib/std/atomic.zig

@@ -3,14 +3,82 @@
 // This file is part of [zig](https://ziglang.org/), which is MIT licensed.
 // The MIT license requires this copyright notice to be included in all copies
 // and substantial portions of the software.
+
+const std = @import("std.zig");
+const target = std.Target.current;
+
+pub const Ordering = std.builtin.AtomicOrder;
+
 pub const Stack = @import("atomic/stack.zig").Stack;
 pub const Queue = @import("atomic/queue.zig").Queue;
-pub const Bool = @import("atomic/bool.zig").Bool;
-pub const Int = @import("atomic/int.zig").Int;
+pub const Atomic = @import("atomic/Atomic.zig").Atomic;
 
 test "std.atomic" {
     _ = @import("atomic/stack.zig");
     _ = @import("atomic/queue.zig");
-    _ = @import("atomic/bool.zig");
-    _ = @import("atomic/int.zig");
+    _ = @import("atomic/Atomic.zig");
+}
+
+pub fn fence(comptime ordering: Ordering) callconv(.Inline) void {
+    switch (ordering) {
+        .Acquire, .Release, .AcqRel, .SeqCst => {
+            @fence(ordering);
+        },
+        else => {
+            @compileLog(ordering, " only applies to a given memory location");
+        },
+    }
+}
+
+pub fn compilerFence(comptime ordering: Ordering) callconv(.Inline) void {
+    switch (ordering) {
+        .Acquire, .Release, .AcqRel, .SeqCst => asm volatile ("" ::: "memory"),
+        else => @compileLog(ordering, " only applies to a given memory location"),
+    }
+}
+
+test "fence/compilerFence" {
+    inline for (.{ .Acquire, .Release, .AcqRel, .SeqCst }) |ordering| {
+        compilerFence(ordering);
+        fence(ordering);
+    }
+}
+
+/// Signals to the processor that the caller is inside a busy-wait spin-loop.
+pub fn spinLoopHint() callconv(.Inline) void {
+    const hint_instruction = switch (target.cpu.arch) {
+        // No-op instruction that can hint to save (or share with a hardware-thread) pipelining/power resources
+        // https://software.intel.com/content/www/us/en/develop/articles/benefitting-power-and-performance-sleep-loops.html
+        .i386, .x86_64 => "pause",
+
+        // No-op instruction that serves as a hardware-thread resource yield hint.
+        // https://stackoverflow.com/a/7588941
+        .powerpc64, .powerpc64le => "or 27, 27, 27",
+
+        // `isb` appears more reliable for releasing execution resources than `yield` on common aarch64 CPUs.
+        // https://bugs.java.com/bugdatabase/view_bug.do?bug_id=8258604
+        // https://bugs.mysql.com/bug.php?id=100664
+        .aarch64, .aarch64_be, .aarch64_32 => "isb",
+
+        // `yield` was introduced in v6k but is also available on v6m.
+        // https://www.keil.com/support/man/docs/armasm/armasm_dom1361289926796.htm
+        .arm, .armeb, .thumb, .thumbeb => blk: {
+            const can_yield = comptime std.Target.arm.featureSetHasAny(target.cpu.features, .{ .has_v6k, .has_v6m });
+            const instruction = if (can_yield) "yield" else "";
+            break :blk instruction;
+        },
+
+        else => "",
+    };
+
+    // Memory barrier to prevent the compiler from optimizing away the spin-loop
+    // even if no hint_instruction was provided.
+    asm volatile (hint_instruction ::: "memory");
+}
+
+test "spinLoopHint" {
+    var i: usize = 10;
+    while (i > 0) : (i -= 1) {
+        spinLoopHint();
+    }
 }