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[mono][jit] ArmBase methods are now intrinsic. #85458

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merged 3 commits into from
May 2, 2023
Merged

[mono][jit] ArmBase methods are now intrinsic. #85458

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3c3cf25
ArmBase methods are now intrinsic.
jandupej Apr 27, 2023
d6f6849
Arm.Yield maps to a NOP.
jandupej Apr 27, 2023
50b4d23
Adding hint operation for arm64's yield.
jandupej Apr 28, 2023
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13 changes: 13 additions & 0 deletions src/mono/mono/arch/arm64/arm64-codegen.h
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Expand Up @@ -703,6 +703,19 @@ arm_encode_arith_imm (int imm, guint32 *shift)
#define arm_mulw(p, rd, rn, rm) arm_maddw ((p), (rd), (rn), (rm), ARMREG_RZR)

/* FIXME: Missing multiple opcodes */
#define arm_format_clx(p, sf, op, rd, rn) arm_emit ((p), 0b01011010110000000001000000000000 | (sf) << 31 | (op) << 10 | (rn) << 5 | (rd))
#define arm_clsw(p, rd, rn) arm_format_clx ((p), 0, 1, (rd), (rn))
#define arm_clsx(p, rd, rn) arm_format_clx ((p), 1, 1, (rd), (rn))
#define arm_clzw(p, rd, rn) arm_format_clx ((p), 0, 0, (rd), (rn))
#define arm_clzx(p, rd, rn) arm_format_clx ((p), 1, 0, (rd), (rn))

#define arm_format_mulh(p, u, rd, rn, rm) arm_emit ((p), 0b10011011010000000111110000000000 | (u) << 23 | (rm) << 16 | (rn) << 5 | (rd))
#define arm_smulh(p, rd, rn, rm) arm_format_mulh ((p), 0, (rd), (rn), (rm))
#define arm_umulh(p, rd, rn, rm) arm_format_mulh ((p), 1, (rd), (rn), (rm))

#define arm_format_rbit(p, sf, rd, rn) arm_emit ((p), 0b01011010110000000000000000000000 | (sf) << 31 | (rn) << 5 | (rd))
#define arm_rbitw(p, rd, rn) arm_format_rbit ((p), 0, (rd), (rn))
#define arm_rbitx(p, rd, rn) arm_format_rbit ((p), 1, (rd), (rn))

/* Division */
#define arm_format_div(p, sf, o1, rd, rn, rm) arm_emit ((p), ((sf) << 31) | (0xd6 << 21) | ((rm) << 16) | (0x1 << 11) | ((o1) << 10) | ((rn) << 5) | ((rd) << 0))
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8 changes: 8 additions & 0 deletions src/mono/mono/mini/cpu-arm64.mdesc
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Expand Up @@ -467,6 +467,14 @@ arm64_cbzw: src1:i len:16
arm64_cbzx: src1:i len:16
arm64_cbnzw: src1:i len:16
arm64_cbnzx: src1:i len:16
lzcnt32: dest:i src1:i len:4
lzcnt64: dest:i src1:i len:4
lscnt32: dest:i src1:i len:4
lscnt64: dest:i src1:i len:4
xop_i8_i8: dest:i src1:i len:4
xop_i4_i4: dest:i src1:i len:4
arm64_smulh: dest:i src1:i src2:i len:4
arm64_umulh: dest:i src1:i src2:i len:4

atomic_add_i4: dest:i src1:i src2:i len:32
atomic_add_i8: dest:i src1:i src2:i len:32
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35 changes: 35 additions & 0 deletions src/mono/mono/mini/mini-arm64.c
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Expand Up @@ -5328,6 +5328,41 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
arm_strx (code, i, ins->sreg1, MONO_STRUCT_OFFSET (MonoContext, regs) + i * sizeof (target_mgreg_t));
break;

/**** Arm.ArmBase ****/
case OP_LZCNT32:
arm_clzw (code, dreg, sreg1);
break;

case OP_LSCNT32:
arm_clsw (code, dreg, sreg1);
break;

case OP_LZCNT64:
arm_clzx (code, dreg, sreg1);
break;

case OP_LSCNT64:
arm_clsx (code, dreg, sreg1);
break;

case OP_ARM64_SMULH:
arm_smulh (code, dreg, sreg1, sreg2);
break;

case OP_ARM64_UMULH:
arm_umulh (code, dreg, sreg1, sreg2);
break;

case OP_XOP_I8_I8:
g_assert (ins->inst_c0 == INTRINS_BITREVERSE_I64);
arm_rbitx (code, dreg, sreg1);
break;

case OP_XOP_I4_I4:
g_assert (ins->inst_c0 == INTRINS_BITREVERSE_I32);
arm_rbitw (code, dreg, sreg1);
break;

default:
g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
g_assert_not_reached ();
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10 changes: 9 additions & 1 deletion src/mono/mono/mini/simd-intrinsics.c
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Expand Up @@ -3117,6 +3117,7 @@ static SimdIntrinsic armbase_methods [] = {
{SN_LeadingZeroCount},
{SN_MultiplyHigh},
{SN_ReverseElementBits},
{SN_Yield},
{SN_get_IsSupported},
};

Expand Down Expand Up @@ -3560,7 +3561,7 @@ static const SimdIntrinsic dp_methods [] = {
static const IntrinGroup supported_arm_intrinsics [] = {
{ "AdvSimd", MONO_CPU_ARM64_NEON, advsimd_methods, sizeof (advsimd_methods) },
{ "Aes", MONO_CPU_ARM64_CRYPTO, crypto_aes_methods, sizeof (crypto_aes_methods) },
{ "ArmBase", MONO_CPU_ARM64_BASE, armbase_methods, sizeof (armbase_methods) },
{ "ArmBase", MONO_CPU_ARM64_BASE, armbase_methods, sizeof (armbase_methods), TRUE },
{ "Crc32", MONO_CPU_ARM64_CRC, crc32_methods, sizeof (crc32_methods) },
{ "Dp", MONO_CPU_ARM64_DP, dp_methods, sizeof (dp_methods) },
{ "Rdm", MONO_CPU_ARM64_RDM, rdm_methods, sizeof (rdm_methods) },
Expand Down Expand Up @@ -3596,6 +3597,13 @@ emit_arm64_intrinsics (
(is_64bit ? OP_XOP_I8_I8 : OP_XOP_I4_I4),
(is_64bit ? INTRINS_BITREVERSE_I64 : INTRINS_BITREVERSE_I32),
arg0_type, fsig, args);
case SN_Yield: {
MonoInst* ins;
MONO_INST_NEW (cfg, ins, OP_NOP);
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arm64 has a yield instruction.

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Added OP_ARM64_HINT to account for this and other hint codes. This is also reflected on LLVM side.

MONO_ADD_INS (cfg->cbb, ins);
return ins;
}

default:
g_assert_not_reached (); // if a new API is added we need to either implement it or change IsSupported to false
}
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1 change: 1 addition & 0 deletions src/mono/mono/mini/simd-methods.h
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Expand Up @@ -286,6 +286,7 @@ METHOD(CarrylessMultiply)
// ArmBase
METHOD(LeadingSignCount)
METHOD(ReverseElementBits)
METHOD(Yield)
// Crc32
METHOD(ComputeCrc32)
METHOD(ComputeCrc32C)
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