AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
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Apr 11, 2025 - SystemVerilog
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asic
Here are 38 public repositories matching this topic...
CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
cmake asic fpga cpp verification rtl verilog xilinx vivado systemverilog systemc unit-tests hdl modelsim uvm verilator quartus testing-rtl
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Nov 25, 2019 - SystemVerilog
An Open Workflow to Build Custom SoCs and run Deep Models at the Edge
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Feb 7, 2025 - SystemVerilog
A PULP SoC for education, easy to understand and extend with a full flow for a physical design.
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Apr 18, 2025 - SystemVerilog
Repository gathering basic modules for CDC purpose
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Dec 31, 2019 - SystemVerilog
Simple single-port AXI memory interface
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Jun 7, 2024 - SystemVerilog
An open source, parameterized SystemVerilog digital hardware IP library
asic fpga hardware ip verilog systemverilog hardware-designs hardware-libraries hdl digital-design asic-library fpga-library
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May 26, 2024 - SystemVerilog
RISCV CPU implementation in SystemVerilog
asic fpga assembler riscv verilog systemverilog fpga-soc risc-v rv32i crossbar axi4 axi4-protocol asic-design riscv-cpu
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Oct 8, 2024 - SystemVerilog
Implementation of a binary search tree algorithm in a FPGA/ASIC IP
asic fpga ip verilog binary-tree systemverilog binary-trees bst fpga-accelerator bstree asic-design svut
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Sep 5, 2021 - SystemVerilog
SystemVerilog Logger
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Nov 14, 2022 - SystemVerilog
6-stage in-order dual-issue superscalar risc-v cpu with floating point unit
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Apr 6, 2025 - SystemVerilog
RISC-V processor with CPI=1 (every single instruction executed in a single clock cycle).
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Apr 18, 2025 - SystemVerilog
ASIC Design lab. Pipelined, Cached, Multicore MIPS Processor
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Aug 23, 2017 - SystemVerilog
Benchmark of precision-scalable MAC unit architectures for embedded neural-network processing
asic neural-networks precision-scalable-circuits neural-accelerators configurable-circuits multiply-accumulate
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Oct 24, 2024 - SystemVerilog
Benchmark fo state-of-the-art Precision Scalable MAC Arrays (PSMAs)
asic neural-networks precision-scalable-circuits neural-accelerators configurable-circuits multiply-accumulate mac-array-utilization
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Nov 2, 2021 - SystemVerilog
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